Receivers

  • No Comments

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI

A 6.3–18.4 GHz I/Q Receiver With RF and LO Path Reconfigurability for 6G FR3 Applications in 22-nm FD-SOI 150 150
Author(s): Haisu Ju, Yingtao Zou, Gabriel M. Rebeiz

Abstract:

This article presents a 6.3–18.4GHz in-phase and quadrature (I/Q) direct down-conversion receiver featuring reconfigurability in both the radio frequency (RF) and local oscillator (LO) paths. The receiver comprises a multi-band reconfigurable RF front-end, double-balanced passive I/Q mixers, an I/Q LO generation network with a tunable I/Q …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3698025
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Ka-Band Eight-Stream Phased-Array MIMO Receiver With Time-Hopping Blocker Rejection for 6G

A Ka-Band Eight-Stream Phased-Array MIMO Receiver With Time-Hopping Blocker Rejection for 6G 150 150
Author(s): Minzhe Tang, Dongfan Xu, Yi Zhang, Yuxuan Liu, Zheng Li, Yuncheng Zhang, Yilun Chen, Minghao Fan, Ziyuan Ren, Jian Pang, Dingxin Xu, Chenxin Liu, Daxu Zhang, Duo Li, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

This article presents a Ka-band phased-array multiple-input multiple-output (MIMO) receiver for sixth-generation (6G) wireless networks. A time-division (TD) MIMO architecture is combined with DP antenna array to support eight MIMO streams in the Ka band. The complex weights of each RF element in both polarization arrays are sequentially switched at …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 21
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695546
Publisher: IEEE

View on IEEE Xplore

  • No Comments

0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis

0.13 K NETD D-Band CMOS Passive Imager With Noise Suppression Analysis 150 150
Author(s): Zahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Yuhao Yuan, Qun Jane Gu

Abstract:

This article presents a new system design and in-depth analysis of a wideband, low-power passive imaging receiver based on a Dicke-switch architecture, implemented in 28 nm CMOS technology. The proposed structure employs a three-coil gm-boosting technique for the low-noise amplifier (LNA). This approach reduces the LNA’s noise figure (NF) and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 830 – 846
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3646943
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer

A Multiply-and-Accumulate SAR-ADC-Based Hybrid Slepian Beamformer 150 150
Author(s): Zhengqi Xu, Zhiyuan Zhao, Michael A. Laun, Coleman DeLude, Justin Romberg, Michael P. Flynn

Abstract:

This article introduces a hybrid Slepian beamforming receiver architecture with low power and area costs. Traditional large-scale true-time-delay (TTD) beamformers for wideband wireless communication suffer from high power consumption and high hardware costs. As an alternative, the Slepian beamforming approach reduces the number of analog-to-digital conversions (ADCs) and delays for …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3651452
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 112-Gb/s PAM4 Receiver With a Phase Equalization AFE in 7-nm FinFET

A 112-Gb/s PAM4 Receiver With a Phase Equalization AFE in 7-nm FinFET 150 150
Author(s): Huanan Guo, Yufeng Yao, Xiang Gao

Abstract:

To reduce the bit-error-rate (BER), equalizers are implemented in high-speed SerDes receivers (RX) to compensate for channel insertion loss and mitigate intersymbol interference (ISI). Conventional analog front-end (AFE) designs primarily focus on amplitude gain while neglecting the influence of phase shift. This brief presents a phase equalization (PEQ) AFE design …

Published in: IEEE Solid-State Circuits Letters
Page(s): 5 – 8
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3637833
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Frequency-Agile Self-Interference Cancellation in a Wideband Compact Full-Duplex Receiver Using Cascaded Low-Noise and High-Delay-Bandwidth-Product APFs

Frequency-Agile Self-Interference Cancellation in a Wideband Compact Full-Duplex Receiver Using Cascaded Low-Noise and High-Delay-Bandwidth-Product APFs 150 150
Author(s): Xingyu Ma, Wei Li, Shijiao Dong, Ruiyu Lyu, Fan Chen, Yunyou Pu, Chuangguo Wang, Hongtao Xu

Abstract:

Wideband self-interference cancellation (SIC) in a full-duplex (FD) system requires the cancellers to achieve flat nanosecond-scale RF delay while minimizing the noise penalty to the receiver (RX). This work proposes: 1) cascadable hybrid low-noise first-order all-pass filters (APFs) in the first tap of the RF canceller to reduce the noise figure (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3618610
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 1-8 GHz, 190MHz BB BW Mixer-First Receiver With Bootstrapped Mixer Switches Achieving Over 16dBm In-Band IIP3

A 1-8 GHz, 190MHz BB BW Mixer-First Receiver With Bootstrapped Mixer Switches Achieving Over 16dBm In-Band IIP3 150 150
Author(s): Erwin Hardeveld, Ronan van der Zee, Bram Nauta

Abstract:

In this article, we propose a wideband mixer-first receiver with improved in-band (IB) linearity. It uses bootstrapped N-path mixer switches to achieve a constant on-state gate–source voltage for large IB signals. We analyze the tradeoff between on-state resistance and off-state subthreshold current in conventional mixer switches and introduce a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3606117
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Simultaneous Dual-Carrier Transformer-Coupled Passive Mixer-First Receiver Front-End Supporting Blocker Suppression

A Simultaneous Dual-Carrier Transformer-Coupled Passive Mixer-First Receiver Front-End Supporting Blocker Suppression 150 150
Author(s): Jamie C. Ye, Alain H. Antón, Sanaz Sadeghi, Russ H. Huang, Alyosha C. Molnar

Abstract:

A high dynamic range N-path passive mixer-first receiver architecture capable of simultaneously down-converting two arbitrary bands through a single RF port is presented. The architecture consists of two passive mixers arranged in a series configuration with a transformer front-end to minimize cross-loading between mixers while still providing impedance transparency and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1541 – 1553
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3546082
Publisher: IEEE

View on IEEE Xplore

Search this website