Quadrature amplitude modulation

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A Pseudo-Series Resonance CMOS Oscillator

A Pseudo-Series Resonance CMOS Oscillator 150 150
Author(s): Jiawen Chen, Kai Xu, Teerachot Siriburanon, Robert Bogdan Staszewski

Abstract:

This article presents a single-core, low-phase-noise (PN) digitally controlled oscillator (DCO) employing a pseudo-series resonance (pseudo-SR) technique with a transformer-based resonator. The proposed pseudo-SR resonator offers two key advantages: 1) a low impedance with a 180° phase shift at the impedance pole, emulating series resonance (SR) to enable single-stage oscillation and reduce …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3663515
Publisher: IEEE

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An Optimal Modulation Bits-to-RF Digital Transmitter Using Time-Interleaved Multi-Subharmonic Switching

An Optimal Modulation Bits-to-RF Digital Transmitter Using Time-Interleaved Multi-Subharmonic Switching 150 150
Author(s): Timur Zirtiloglu, Arman Tan, Basak Ozaydin, Ken R. Duffy, Muriel Médard, Rabia Tugce Yazicigil

Abstract:

This article presents a fully integrated bits-to-RF transmitter (Tx) featuring deep power back-off (PBO) enhancements, leveraging a multi-subharmonic switching (multi-SHS) digital power amplifier (DPA) with time-interleaving and a harmonic-rejection digital-to-phase converter (DPC). This work employs a nonuniform optimal modulation (OM) constellation, where symbol probability is inversely related to its amplitude, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3659903
Publisher: IEEE

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An Antenna-to-Bits F-Band 120-Gbps CMOS RF-64QAM Receiver

An Antenna-to-Bits F-Band 120-Gbps CMOS RF-64QAM Receiver 150 150
Author(s): Youssef O. Hassan, Mohammad Oveisi, Zisong Wang, Payam Heydari

Abstract:

A CMOS 100–140-GHz end-to-end receiver (RX) is presented that integrates the antenna input all the way to the bitstream output, while demodulating 64QAM/16QAM/QPSK entirely in the analog domain. A sequential asynchronous demodulation method enables 120-Gbps operation at a notably small baseband power consumption. Fabricated in a 22-nm FDSOI …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3648748
Publisher: IEEE

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CORDIC-Less Digital Polar Transmitter Architecture Based on Delta-Sigma Modulator

CORDIC-Less Digital Polar Transmitter Architecture Based on Delta-Sigma Modulator 150 150
Author(s): Yuncheng Zhang, Zezheng Liu, Duo Li, Minzhe Tang, Yi Zhang, Hóngyè Huáng, Dingxin Xu, Waleed Madany, Ashbir Aviat Fadila, Wenqian Wang, Yuang Xiong, Daxu Zhang, Garry Pranata Kusuma, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

Conventional digital polar transmitters (TXs) suffer from limited power efficiency and linearity due to the multi-bit nature of intermediate signals. This work proposes a digital polar TX architecture that avoids such drawbacks by reducing the bit count of TX signals. The proposed TX oversamples and quantizes multi-bit I/Q inputs …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3611233
Publisher: IEEE

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