Phased arrays

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A 436–472 GHz 4-Element IF Beamforming Phased-Array Receiver in 65-nm CMOS

A 436–472 GHz 4-Element IF Beamforming Phased-Array Receiver in 65-nm CMOS 150 150
Author(s): Hao Guo, Hao-Tao Hu, Zhicheng Lin, Zijun Guo, Xiaoyue Xia, Kaizhe Guo, Kam Man Shum, Pui-In Mak, Chi Hou Chan

Abstract:

This article presents a 436–472GHz four-element intermediate-frequency (IF) beamforming phased-array receiver fabricated in 65-nm CMOS, targeting scalable terahertz (THz) phased-array systems. The proposed receiver adopts a two-step mixing scheme to reduce the area overhead of the IF beamforming implementation, thereby enhancing the array scalability at THz frequencies. Each receive channel …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3710258
Publisher: IEEE

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A 138 Gb/s D-Band 2-D Scalable Transceiver Array With On-Chip Antennas Achieving Sub-1-pJ/b Efficiency in 28-nm Bulk CMOS

A 138 Gb/s D-Band 2-D Scalable Transceiver Array With On-Chip Antennas Achieving Sub-1-pJ/b Efficiency in 28-nm Bulk CMOS 150 150
Author(s): Hesham Beshary, Yikuan Chen, Ali M. Niknejad

Abstract:

This article presents a D-band 2-D scalable phased array that integrates a $2{\,}\times{\,} 2$ transceiving (TRX) radio frequency (RF) beamformer with on-chip antennas (OCAs) and a $\times 16$ local-oscillator (LO) multiplication chain. The 2-D array scalability is demonstrated by tiling $2{\,}\times{\,} 2$ chips into an array using a low-cost package to build a 16…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3704818
Publisher: IEEE

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A Quadrature-Rotation Phased-Array Transmitter With High-Resolution Phase Tuning and Complex Domain Power Back-Off Efficiency Enhancement

A Quadrature-Rotation Phased-Array Transmitter With High-Resolution Phase Tuning and Complex Domain Power Back-Off Efficiency Enhancement 150 150
Author(s): Jie Zhou, Bingzheng Yang, Hongxin Tang, Xun Luo

Abstract:

In this article, a four-element digital-modulated phased-array transmitter based on quadrature switched/floated-capacitor power amplifiers (SFCPAs) and reconfigurable switched-capacitor tuning lines (RSCTLs) is proposed. Phase shifting in each element is achieved by hybrid coarse and fine phase-tuning approaches. The SFCPAs with the quadrature-rotation technique are presented for coarse phase tuning. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3702007
Publisher: IEEE

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A Ka-Band Eight-Stream Phased-Array MIMO Receiver With Time-Hopping Blocker Rejection for 6G

A Ka-Band Eight-Stream Phased-Array MIMO Receiver With Time-Hopping Blocker Rejection for 6G 150 150
Author(s): Minzhe Tang, Dongfan Xu, Yi Zhang, Yuxuan Liu, Zheng Li, Yuncheng Zhang, Yilun Chen, Minghao Fan, Ziyuan Ren, Jian Pang, Dingxin Xu, Chenxin Liu, Daxu Zhang, Duo Li, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

This article presents a Ka-band phased-array multiple-input multiple-output (MIMO) receiver for sixth-generation (6G) wireless networks. A time-division (TD) MIMO architecture is combined with DP antenna array to support eight MIMO streams in the Ka band. The complex weights of each RF element in both polarization arrays are sequentially switched at …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 21
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3695546
Publisher: IEEE

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A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation

A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation 150 150
Author(s): Wei-Chun Wang, Shida Zhang, Coleman DeLude, Laith Shamieh, Nael Mizanur Rahman, Isha Chakraborty, Justin Romberg, Saibal Mukhopadhyay

Abstract:

An analog compute-in-memory (CIM) Slepian beamforming (SBF) accelerator is introduced for large-scale multi-input–multi-output (MIMO). The design performs complex-valued vector–matrix multiplication in the analog domain to project 256 I/Q inputs into a low-dimensional Slepian subspace and uses a digital backend with 4-tap FIR filters to generate one output beam. …

Published in: IEEE Solid-State Circuits Letters
Page(s): 154 – 157
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3690381
Publisher: IEEE

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A 95.3% Efficiency APT/AET/SPT Multimode Multiband CMOS/GaN Envelope Tracking for 6G-Oriented Systems

A 95.3% Efficiency APT/AET/SPT Multimode Multiband CMOS/GaN Envelope Tracking for 6G-Oriented Systems 150 150
Author(s): Chun-Yuan Chen, Yi-Chun Huang, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

Abstract:

This article proposes an envelope-tracking (ET) supply modulator (SM) that is scalable for sixth-generation (6G) communication systems. The design leverages a cost-efficient CMOS process for the power converters and a high-performance GaN process for the high-frequency power amplifier (PA) and the depletion-mode-only GaN-based amplifier. The proposed ET supply modulator (ETSM) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3681319
Publisher: IEEE

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A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays

A Compact, Wideband Complex Cascode Power Amplifier With LC Neutralization for VSWR-Resilient Operation in High-Density Phased Arrays 150 150
Author(s): Mohamed Eleraky, Tzu-Yuan Huang, Hua Wang

Abstract:

This article proposes a design methodology for achieving intrinsic performance resilience in power amplifiers (PAs) against antenna impedance variations inherent to modern phased-array systems through the improvement of the PA output matching ( $S!_{22}$ ). This goal, however, presents a challenge for conventional cascode PAs due to their inherently high output impedance …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3654669
Publisher: IEEE

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A 298–334-GHz Scalable Injection-Locked Phased-Array Radiator With Second-Subharmonic-Termination-Assisted Waveform Formulation for Power Enhancement

A 298–334-GHz Scalable Injection-Locked Phased-Array Radiator With Second-Subharmonic-Termination-Assisted Waveform Formulation for Power Enhancement 150 150
Author(s): Meng Yang, Liang Wu

Abstract:

This article introduces an injection-locked $4\times 2$ phased-array radiator featuring scalability in both horizontal and vertical dimensions. The system architecture is constructed by sequentially cascading four identical phase-shifting and frequency-quadrupling (PSFQ) elements in a chain-like configuration and then cohering two such chains, thereby achieving global frequency synchronization. Particularly, phase shifting and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3624563
Publisher: IEEE

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A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS

A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS 150 150
Author(s): Chun-Sheng Lin, Chih-Hsueh Lin, Chun-Hsing Li

Abstract:

A 240-GHz direct-conversion transmitter (TX), consisting of an LO chain and fundamental I/Q mixers, is proposed for sub-THz communication applications. The LO chain integrates phase-shifter-embedded impedance matching networks (IMNs) and frequency tripler with an optimized harmonic IMN, delivering I/Q LO signals at 240 GHz with high output power, 360° phase …

Published in: IEEE Solid-State Circuits Letters
Page(s): 225 – 228
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3592246
Publisher: IEEE

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