Oscillators

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A Third-Harmonic-Enhanced Triple-Push DCO Utilizing Source-Combining Technique

A Third-Harmonic-Enhanced Triple-Push DCO Utilizing Source-Combining Technique 150 150
Author(s): Qiyao Jiang, Zhuo Xu, Quan Pan, Pui-In Mak, Rui P. Martins, Jun Yin

Abstract:

This article presents a detailed investigation into optimizing the amplitude and phase of the transistor’s terminal voltages to generate a high 3rd-harmonic current in the millimeter-wave (mm-Wave) frequency. Based on the analysis, the digitally controlled source-combining triple-push (SCTP) oscillator is derived to significantly enhance the 3rd-harmonic current by introducing …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3692500
Publisher: IEEE

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A 60-GHz Class- F2,3 Standing-Wave Oscillator Employing Triple-Line Resonator Achieving −189-dBc/Hz FoM in 65-nm CMOS

A 60-GHz Class- F2,3 Standing-Wave Oscillator Employing Triple-Line Resonator Achieving −189-dBc/Hz FoM in 65-nm CMOS 150 150
Author(s): Wei-Yu Lin, Nikhil Jain, Jun-Chau Chien

Abstract:

Implementing oscillators with harmonic engineering beyond 60-GHz poses significant challenges due to the need for small inductors resonating beyond 120 GHz. To address this issue, this work presents a 60-GHz standing-wave oscillator (SWO) with both second- and third-harmonic boosting for phase noise reduction. A triple-line resonator is proposed to sustain both …

Published in: IEEE Solid-State Circuits Letters
Page(s): 158 – 161
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3693153
Publisher: IEEE

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A 550-μW Capacitor-Assisted Transformer-Based VCO Achieving 204-dBc/Hz FoMA at 1-MHz Frequency Offset

A 550-μW Capacitor-Assisted Transformer-Based VCO Achieving 204-dBc/Hz FoMA at 1-MHz Frequency Offset 150 150
Author(s): Teng-Shen Yang, Liang-Hung Lu

Abstract:

This letter presents a capacitor-assisted transformer (CTF)-based voltage-controlled oscillator (VCO) that achieves a low flicker-noise corner with submilliwatt power consumption and compact chip area. By introducing a small assisting capacitor into the transformer, the higher order tank impedance is reshaped from the second-resonance region toward the third-resonance region, resulting …

Published in: IEEE Solid-State Circuits Letters
Page(s): 150 – 153
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3690818
Publisher: IEEE

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A Complementary Positive Feedback-Assisted Current Mirror-Based Level Shifter for Energy-Efficient Level Conversion for Wide Voltage Ranges

A Complementary Positive Feedback-Assisted Current Mirror-Based Level Shifter for Energy-Efficient Level Conversion for Wide Voltage Ranges 150 150
Author(s): Shin Han, Gicheol Shin, Jongmin Lee, Yoonmyung Lee

Abstract:

A complementary positive feedback-assisted current mirror-based level shifter (CPFLS) is proposed to reliably convert subthreshold signals to higher voltages. By adopting a positive feedback structure, the CPFLS mitigates the delay degradation and short-circuit current issues inherent in a prior art, WCMLS, due to its negative feedback design. Additionally, the CPFLS …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3687258
Publisher: IEEE

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A 415 μW 2.4 GHz Receiver With Third-Harmonic Time-Interleaved Passive Mixer and Reconfigurable AFIR Filter for IoT Applications

A 415 μW 2.4 GHz Receiver With Third-Harmonic Time-Interleaved Passive Mixer and Reconfigurable AFIR Filter for IoT Applications 150 150
Author(s): Zongle Ma, Yicheng Chen, Qing Li, Kai Li, Kaixue Ma, Keping Wang

Abstract:

This article presents a 2.4 GHz receiver with a third-harmonic time-interleaved passive mixer and reconfigurable analog finite-impulse-response (AFIR) filter. To improve linearity while maintaining low power consumption, a 6-path third-harmonic time-interleaved mixer with a 6-phase non-overlapping local oscillator (LO) is proposed, employing capacitive stacking and charge sharing techniques to enhance in-band …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3686034
Publisher: IEEE

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A 6.8–14-GHz Ring-Based Sampling-PLL Achieving 69.3-fs Jitter Under 50-mV Supply Noise

A 6.8–14-GHz Ring-Based Sampling-PLL Achieving 69.3-fs Jitter Under 50-mV Supply Noise 150 150
Author(s): Mahmoud A. Khalil, Mohamed Badr Younis, Ruhao Xia, Ahmed E. Abdelrahman, Tianyu Wang, Kyu-Sang Park, Pavan Kumar Hanumolu

Abstract:

This article presents a type-III wide-bandwidth ring-oscillator-based analog phase-locked loop (PLL) optimized for low-jitter performance in noisy supply environments. The design uses an 812.5-MHz reference frequency and a high-gain sampling phase detector to achieve a closed-loop bandwidth over 100 MHz, effectively reducing the intrinsic phase noise of the ring oscillator. To …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3683111
Publisher: IEEE

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A 16-MHz CMOS RC Frequency Reference Achieving Accuracies of ±125 ppm From −40 °C to 85 °C and −560/+580 ppm After Accelerated Aging

A 16-MHz CMOS RC Frequency Reference Achieving Accuracies of ±125 ppm From −40 °C to 85 °C and −560/+580 ppm After Accelerated Aging 150 150
Author(s): Runtao Huo, Weihao Jie, Yiwen Zhang, Honglan Jiang, Hui Wang

Abstract:

This article presents a low-power, high-accuracy CMOS RC frequency reference featuring a capacitively modulated RC time constant (CMT) generation and a die-to-die error removal (DDER) technique for precise frequency generation with a low-calibration cost. Unlike resistive trimming, the temperature dependence of the on-chip resistor is compensated by a $\Delta \Sigma $ …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3684094
Publisher: IEEE

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A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators

A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators 150 150
Author(s): Ali Mostafa, Emmanuel Hardy, Franck Badets

Abstract:

This work presents an injection-locked oscillator (ILO)-based feature extraction (FEx) system. It combines voltage- and time-domain signal processing to implement a power-efficient programmable gain amplifier (PGA) and a small-footprint, high-selectivity ILO-based voltage-to-time converter bandpass filter (VTC-BPF) bank and rectifier. The VTC-BPF enables direct analog-to-time conversion, eliminating the need for …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3681481
Publisher: IEEE

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A Low-Jitter Fractional-N Sampling PLL With Voltage-Domain Quantization-Error Cancellation Using a Nonlinearity-Replication Technique

A Low-Jitter Fractional-N Sampling PLL With Voltage-Domain Quantization-Error Cancellation Using a Nonlinearity-Replication Technique 150 150
Author(s): Yuhwan Shin, Juyeop Kim, Junseok Lee, Yongwoo Jo, Jaehyouk Choi

Abstract:

This work presents a low-jitter, low-fractional-spur fractional- $N$ digital sampling phase-locked loop (SPLL) that generates output frequencies from 10.4to 11.8GHz. Conventional fractional- $N$ PLLs employ a digital-to-time converter (DTC) to cancel the quantization error (Q-error) of the delta-sigma modulator ( $Delta Sigma $ M). To address the nonlinearity (NL) of the DTC, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3681940
Publisher: IEEE

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