Optimization

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An 8K-Spin Ising Machine IC With Reconfigurable Many-Body Spin Interactions and 1-D Multi-Chip Scalability

An 8K-Spin Ising Machine IC With Reconfigurable Many-Body Spin Interactions and 1-D Multi-Chip Scalability 150 150
Author(s): Jaeyeong Kim, Jae-Yoon Sim

Abstract:

Combinatorial optimization problems (COPs) have attracted growing interest in CMOS Ising machines as hardware accelerators for near-optimal solution search. However, practical large-scale COP solving remains challenging because existing CMOS Ising machines face substantial preprocessing overhead for irregular or higher order problems and are limited in scalability beyond a single chip. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3730399
Publisher: IEEE

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A 28-nm, 8.3-mm2, 76.9-μJ/Pairing Compiler-Driven Crypto-Processor for Hybrid ZKP–PBC Application With Software–Hardware Co-Design

A 28-nm, 8.3-mm2, 76.9-μJ/Pairing Compiler-Driven Crypto-Processor for Hybrid ZKP–PBC Application With Software–Hardware Co-Design 150 150
Author(s): Xiangren Chen, Bohan Yang, Jinfan Zhang, Yifan Jiang, Wenping Zhu, Hanning Wang, Min Zhu, Aoyang Zhang, Leibo Liu

Abstract:

Zero-knowledge proof (ZKP), one of the most popular privacy-preserving schemes, enables the prover to convince the verifier of a certain statement’s correctness without leaking any private information. Among them, the Pairing-based succinct non-interactive argument of knowledge (zkSNARK), like Groth16 and Plonk, featuring succinct proof size and constant-time verification, is …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3722561
Publisher: IEEE

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A Mixed-Signal SAT Solver for Exploring Nonideal Effects and Scalability in Analog Computation

A Mixed-Signal SAT Solver for Exploring Nonideal Effects and Scalability in Analog Computation 150 150
Author(s): Ahmet Yusuf Salim, Soner Seçkiner, Eslam Elmitwalli, Zeljko Ignjatovic, Selçuk Köse

Abstract:

Recent years have seen growing interest in custom and nature-inspired computing methods for solving computationally challenging combinatorial optimization problems. The Boolean satisfiability (SAT), a canonical nondeterministic polynomial (NP)-complete problem, has remained a focal point due to its wide applicability in artificial intelligence, cryptography, and formal verification. This article presents …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 19
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3721413
Publisher: IEEE

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P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments

P-Dits for the Frequency Assignment Problem With Transmitter Deactivation in Dense Environments 150 150
Author(s): Christian Duffee, Jordan Athas, Igor Kadota, Randall Berry, Pedram Khalili Amiri

Abstract:

The frequency assignment problem is a nondeterministic polynomial-time hard (NP-hard) optimization problem concerning the assignment of frequency channels to wireless transmitters. Typically, the aim is to minimize interference between transmitters while maintaining a high level of service. In this work, the use of probabilistic d-dimensional bits, or p-dits, for this …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 78 – 85
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3690563
Publisher: IEEE

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A 1.87-TELOPS/W 3-D Ising Machine for Accelerated Quantum Monte Carlo With Reconfigurability Using CMOS p-Bits

A 1.87-TELOPS/W 3-D Ising Machine for Accelerated Quantum Monte Carlo With Reconfigurability Using CMOS p-Bits 150 150
Author(s): Ming-Che Li, Archisman Ghosh, Risi Kumar Jaiswal, Supriyo Datta, Shreyas Sen

Abstract:

Qubit-based quantum annealing processors operate at ultra-low temperatures (15 mK) requiring enormous cooling energy. Consequently, there is a lot of interest in quantum Monte Carlo (QMC) algorithms that can be used to emulate quantum computing on classical machines. However, prior classical emulators implemented on CPUs, GPUs, or field-programmable gate arrays (FPGAs) …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3699984
Publisher: IEEE

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A Dual-Band Simultaneous RF Energy Harvesting System With Globally Optimized 3-D MPPT and Efficiency Enhancement

A Dual-Band Simultaneous RF Energy Harvesting System With Globally Optimized 3-D MPPT and Efficiency Enhancement 150 150
Author(s): Xiaguang Li, Qing Miao, Shiheng Yang, Tianting Zhao, Sijun Du, Xiaoyang Zeng, Zhiyuan Chen

Abstract:

This article presents a globally optimized radio frequency (RF) energy harvesting system that leverages the novel concepts of 3-D maximum power point tracking (3-D MPPT) and collaborative source reconfiguration to achieve high MPPT accuracy and a wide input power range. The proposed 3-D MPPT coordinates the energy sources, optimizes the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3662153
Publisher: IEEE

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EMO-CIM: An Input/Stationary-Data Similarity-Aware Computing-In-Memory Design for Variable Vector-Wise Computation in Edge Multioperator AI Acceleration

EMO-CIM: An Input/Stationary-Data Similarity-Aware Computing-In-Memory Design for Variable Vector-Wise Computation in Edge Multioperator AI Acceleration 150 150
Author(s): Bo Wang, Yuchen Tang, Feiran Liu, Xiaoxue Zhong, Yuchen Ma, Xin Si, Jun Yang

Abstract:

We propose an edge multioperator computing-in-memory (EMO-CIM) design that supports variable vector-wise multiply-and-accumulate (MAC) in CNN, Depthwise (DW)-Convolution, and Attention operators. It features: 1) a single EMO-CIM bank (ECB) excels in variable vector-wise MAC (V-MAC) for multioperators; 2) merging local input-shared compute units (LISCUs) with a decode-unit and adder-tree (DUAT) facilitates …

Published in: IEEE Solid-State Circuits Letters
Page(s): 97 – 100
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3668853
Publisher: IEEE

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HUTAO: A Reconfigurable Homomorphic Processing UniT With Cache-Aware Operation Scheduling

HUTAO: A Reconfigurable Homomorphic Processing UniT With Cache-Aware Operation Scheduling 150 150
Author(s): Sijia Lu, Wenping Zhu, Bohan Yang, Jiajun Yang, Tongwei Dai, Chen Chen, Xiangdong Han, Jinjiang Yang, Hanning Wang, Min Zhu, Shaojun Wei, Aoyang Zhang, Leibo Liu

Abstract:

Fully homomorphic encryption (FHE) enables privacy-preserving machine learning (PPML) at the cost of intensive computational overhead, which necessitates the use of domain-specific accelerators. To achieve comprehensive support for leveled FHE, this article presents a reconfigurable multi-scheme FHE processor that supports both client-side encryption/decryption and server-side evaluation. First, a reconfigurable …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3657525
Publisher: IEEE

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A 28-nm Digital Compute-in-Memory Ising Annealer With Asynchronous Random Number Generator for Traveling Salesman Problem

A 28-nm Digital Compute-in-Memory Ising Annealer With Asynchronous Random Number Generator for Traveling Salesman Problem 150 150
Author(s): Yuyao Kong, Haomei Liu, Vaidehi Garg, Shimeng Yu

Abstract:

This work presents a compact digital compute-in-memory (DCIM) Ising annealer targeting large-scale combinatorial optimization. A centroid-based weight mapping method combined with hierarchical clustering reduces the memory capacity required for traveling salesman problem (TSP) weights, enabling efficient mapping with limited on-chip storage. An asynchronous random number generator (ARNG) based on dual …

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 4
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3639178
Publisher: IEEE

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