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A Radiation-Hardened 15–22-GHz Frequency Synthesizer in 22-nm FinFET

A Radiation-Hardened 15–22-GHz Frequency Synthesizer in 22-nm FinFET 150 150
Author(s): David Dolt, Samuel Palermo

Abstract:

High-speed radiation-hardened frequency synthesizers are a key block in spaceborne communications systems. This article presents a 15–22-GHz radiation-hardened phase-locked loop (PLL) designed in a 22-nm FinFET process with hardening techniques for single-event upset (SEU) and total ionizing dose (TID) implemented in all key PLL blocks. Electrical performance tradeoffs arising from …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2024
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2024.3380589
Publisher: IEEE

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A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET

A 50-Gb/s Multicarrier Transmitter Using DAC-Based Polar Drivers in 22-nm FinFET 150 150
Author(s): Il-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo

Abstract:

A digital-to-analog converter (DAC)-based polar transmitter (TX) is proposed for multicarrier signaling in wireline applications. The proposed TX achieves a 50-Gb/s total data rate with maximized spectral efficiency by using three parallel 5-GS/s DAC-based drivers and two orthogonal carriers of 5 and 10 GHz. The three DAC-based drivers operating …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2024
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2024.3376079
Publisher: IEEE

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A 6.4-Gb/s/pin nand Flash Memory Multichip Package Employing a Frequency Multiplying Bridge Chip for Scalable Performance and Capacity Storage Systems

A 6.4-Gb/s/pin nand Flash Memory Multichip Package Employing a Frequency Multiplying Bridge Chip for Scalable Performance and Capacity Storage Systems 150 150
Author(s): Shinichi Ikeda, Akira Iwata, Goichi Otomo, Tomoaki Suzuki, Hiroaki Iijima, Mikio Shiraishi, Shinya Kawakami, Masatomo Eimitsu, Yoshiki Matsuoka, Kiyohito Sato, Shigehiro Tsuchiya, Yoshinori Shigeta, Takuma Aoyama

Abstract:

This letter describes a NAND flash memory multichip package (NAND MCP) incorporating a developed LSI interface (IF) Chip (Bridge Chip) in which the IF to and from the solid-state drive (SSD) controller has twice the speed as that of the IF to and from the NAND dies even with multiple …

Published in: IEEE Solid-State Circuits Letters
Page(s): 115 – 118
Year of Publication: 2024
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2024.3377263
Publisher: IEEE

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