Integrated circuit interconnections

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Beyond Backside Power: Backside Signal Routing as Technology Booster for Standard Cell Scaling

Beyond Backside Power: Backside Signal Routing as Technology Booster for Standard Cell Scaling 150 150
Author(s): Anup Ashok Kedilaya, Sirish Oruganti, Nishant Gupta, Xiuhao Zhang, Ilya V. Karpov, Mark Anders, Jaydeep P. Kulkarni

Abstract:

Advances in process technology enabling backside metals and contacts offer new Design-Technology Co-Optimization (DTCO) opportunities to further enhance power, performance, and area gains (PPA) in sub-3nm nodes. This work exploits backside contact technology within standard cells to extend both signal and clock routing to backside metal layers, enabling standard-cell …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3617784
Publisher: IEEE

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3D Stacked HBM and Compute Accelerators for LLM: Optimizing Thermal Management and Power Delivery Efficiency

3D Stacked HBM and Compute Accelerators for LLM: Optimizing Thermal Management and Power Delivery Efficiency 150 150
Author(s): Janak Sharda, Madison Manley, Jungyoun Kwak, Chinsung Park, Muhannad Bakir, Shimeng Yu

Abstract:

Advanced packaging is becoming essential for designing hardware accelerators for large language models (LLMs). Different architectures such as 2.5D integration of memory with logic have been proposed, however the bandwidth limits the throughput of the complete system. Recent works have proposed memory on logic systems, where high bandwidth memory (HBM) …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3617298
Publisher: IEEE

View on IEEE Xplore

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