An 11.95-ENOB 560-MS/s Amplifier-Switching Subranging Analog-to-Digital Converter With Multi-Threshold Comparators https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg 150 150 https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Abstract:
This article proposes a 14-bit, 560-MS/s subranging analog-to-digital converter (ADC) that employs an amplifier-switching architecture with multi-threshold comparators. The proposed amplifier-switching architecture reuses a flash quantizer multiple times during subranging conversion by amplifying the residue voltage with an appropriate gain at each quantization step. This approach reduces the required …