FinFETs

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A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET

A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET 150 150
Author(s): Prashanth Mohan, Siddharth Das, Ken Mai

Abstract:

This letter presents a flexible and energy-efficient RISC-V system-on-chip (SoC) in 22nm FinFET technology, achieving state-of-the-art performance by tightly integrating the CPU with a synthesized embedded FPGA (embedded field programmable gate array (eFPGA)), enabling the implementation of reconfigurable custom instructions. The tight integration of the eFPGA with SoC scratchpad memory …

Published in: IEEE Solid-State Circuits Letters
Page(s): 321 – 324
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3618942
Publisher: IEEE

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A 19.5-GHz Radiation-Hardened Sub-Sampled PLL With Quad-Core VCO in 16-nm FinFET Achieving Sub-50 fs Jitter

A 19.5-GHz Radiation-Hardened Sub-Sampled PLL With Quad-Core VCO in 16-nm FinFET Achieving Sub-50 fs Jitter 150 150
Author(s): David Dolt, Samuel Palermo

Abstract:

This letter presents a radiation-hardened (rad-hard) subsampled phase-locked loop (SS-PLL) that achieves state-of-the-art jitter performance while incorporating radiation-hardened techniques to mitigate single-event-upsets (SEUs) present in the space environment. Furthermore, rad-hard techniques are incorporated in each core PLL subblock which include a rad-hard charge-pump Gm cell, a pulser circuit with triple …

Published in: IEEE Solid-State Circuits Letters
Page(s): 285 – 288
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3610901
Publisher: IEEE

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An 800GbE PAM-4 PHY Transceiver for 42 dB Copper and Direct-Drive Optical Applications in 7 nm

An 800GbE PAM-4 PHY Transceiver for 42 dB Copper and Direct-Drive Optical Applications in 7 nm 150 150
Author(s): Chang Liu, Burak Catli, Yong Liu, Anand Vasani, Guansheng Li, Kun Chuai, Lakshmi Rao, Yang Liu, Xin Meng, Jiawen Zhang, Tim He, Batu Dayanik, Vadim Milirud, Meisam Honarvar Nazari, Hyo Gyuem Rhew, Derui Kong, Arvindh Iyer, Nan Wang, Alireza Nilchi, Aminghasem Safarian, Ray Wang, Hyung-Joon Jeon, Xiaochen Yang, Boyu Hu, Jerry Han, Adesh Garg, Kumar Thasari, Heng Zhang, Namik Kocaman, Ali Nazemi, Delong Cui, Afshin Momtaz, Jun Cao

Abstract:

This work presents a low power DSP-based single-chip 800GbE PAM-4 PHY transceiver in 7 nm process capable of driving eight lanes of up to 112-Gb/s. It supports both electrical and optical links with monolithic integrated laser driver enabling direct-drive PAM-4 output capability for EML and silicon photonics. The transceiver supports 42 …

Published in: IEEE Solid-State Circuits Letters
Page(s): 281 – 284
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3608134
Publisher: IEEE

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An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K

An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K 150 150
Author(s): Hafeez Raza, Shivendra Singh Parihar, Yogesh Singh Chauhan, Hussam Amrouch, Avinash Lahgere

Abstract:

In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum operating voltage ( $V_{\min }$ ) of 5-nm Fin Field-Effect Transistors (FinFETs)-based Static Random Access Memory (SRAM) cells. To perform the SRAM $V_{\min }$ evaluation, we have measured the FinFETs fabricated using a commercial 5…

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 42 – 50
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3560215
Publisher: IEEE

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Cryogenic Hyperdimensional In-Memory Computing Using Ferroelectric TCAM

Cryogenic Hyperdimensional In-Memory Computing Using Ferroelectric TCAM 150 150
Author(s): Shivendra Singh Parihar, Shubham Kumar, Swetaki Chatterjee, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch

Abstract:

Cryogenic operations of electronics present a significant step forward to achieve huge demand of in-memory computing (IMC) for high-performance computing, quantum computing, and military applications. Ferroelectric (FE) is a promising candidate to develop the complementary metal oxide semiconductor (CMOS)-compatible nonvolatile memories. Hence, in this work, we investigate the effectiveness …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 34 – 41
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3547797
Publisher: IEEE

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