Feature extraction

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An Energy-Efficient CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos in 16-nm FinFET

An Energy-Efficient CNN Processor Supporting Bi-Directional FPN for Small-Object Detection on High-Resolution Videos in 16-nm FinFET 150 150
Author(s): Yu-Chun Ding, Chia-Yu Chang, Hui-Yun Tsai, Chun-Yeh Lin, Hao-Jiun Tu, Yu-Ching Su, Kai-Feng Chang, Tsung-Han Hsieh, Wen-Ching Chen, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chao-Tsung Huang

Abstract:

The capability to detect small objects precisely in real time is essential for intelligent systems, particularly in advanced driver assistance systems (ADASs), as it ensures continuous awareness of distant obstacles for enhanced safety. However, achieving high detection precision for small objects requires high-resolution input inference on deep convolutional neural network (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3628249
Publisher: IEEE

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A 0.8-μm 32-Mpixel Always-On CMOS Image Sensor With Windmill-Pattern Edge Extraction and On-Chip DNN

A 0.8-μm 32-Mpixel Always-On CMOS Image Sensor With Windmill-Pattern Edge Extraction and On-Chip DNN 150 150
Author(s): Mamoru Sato, Sachio Akebono, Kazuyoshi Yasuoka, Eriko Kato, Masahiro Tsuruta, Chiaki Takano, Kensuke Ota, Kazuki Haraguchi, Masahiro Watanabe, Genki Fujii, Koichiro Yamanaka, Kazunori Yasuda, Satoshi Minami, Katsuhiko Hanzawa, Kohei Matsuda, Akihiko Kato, Yosuke Ueno

Abstract:

This letter presents a CMOS image sensor (CIS) that integrates two operation modes: 1) a high-resolution viewing mode with $0.8~\mu $ m 32 Mpixels and 2) a low-power always-on object recognition mode consuming 2.67 mW at 10 frames/s. The CIS features a unique windmill-pattern analog edge extraction circuit that is resilient to illumination variations. An …

Published in: IEEE Solid-State Circuits Letters
Page(s): 353 – 356
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3628314
Publisher: IEEE

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A Machine Learning-Inspired PAM-4 Transceiver for Medium-Reach Wireline Links

A Machine Learning-Inspired PAM-4 Transceiver for Medium-Reach Wireline Links 150 150
Author(s): Ramin Javadi, Tejasvi Anand

Abstract:

This article presents an energy-efficient machine learning-inspired PAM-4 wireline transceiver that leverages data encoding at the transmitter (Tx) and feature extraction with classification at the receiver (Rx) to compensate for channel loss ranging from 13 to 26 dB, while maintaining the bit error rate (BER)<10-11. A new consecutive symbol-to-center (CSC) encoding …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3616072
Publisher: IEEE

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A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering

A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering 150 150
Author(s): Arash Akhoundi, Pumiao Yan, Yawende Landbrug, Madeline Hays, Boris Murmann, E. J. Chichilnisky, Dante G. Muratore

Abstract:

This article presents a 1024-channel ultra-low-power spike sorting chip featuring event-driven spike detection and spatial clustering for large-scale neural recording. To address power and scalability constraints in brain–computer interfaces (BCIs), the design integrates a compressive analog-to-digital converter (ADC) with a two-stage spike detector that significantly reduces memory and processing …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3611139
Publisher: IEEE

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An 8.62-μW 75-dB DRSoC Fully Integrated SoC for Spoken Language Understanding

An 8.62-μW 75-dB DRSoC Fully Integrated SoC for Spoken Language Understanding 150 150
Author(s): Sheng Zhou, Zixiao Li, Longbiao Cheng, Jérôme Hadorn, Chang Gao, Qinyu Chen, Tobi Delbruck, Kwantae Kim, Shih-Chii Liu

Abstract:

We present a sub-10- $\mu $ W fully integrated SoC for on-device spoken language understanding (SLU). Its analog feature extractor (FEx) applies global and per-channel automatic gain control (AGC) to extend the system’s dynamic range (DR)—a critical requirement for real-world scenarios, including far-field operations. The on-chip streaming-mode recurrent …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3602936
Publisher: IEEE

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