A 77-fJ/bit 8-Gbps Adaptive-Voltage-Compatible Self-Timed Die-to-Die Link for 2.5-D and 3-D Interconnect in 3 nm https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg 150 150 https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Abstract:
This work presents a self-timed die-to-die link that serializes four data bits per pin for 2.5-D, or 3-D interconnects using a standard adaptive digital clock and voltage supply. The link achieves 8 Gbps of per-pin bandwidth with a latency of one cycle, energy efficiency of 77 fJ/b, and bandwidth density of 44…