compute-in-memory

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STAR-SRAM: 16-bit Floating-Point SRAM-Based Digital Computing-in-Memory Macro in a 28 nm

STAR-SRAM: 16-bit Floating-Point SRAM-Based Digital Computing-in-Memory Macro in a 28 nm 150 150
Author(s): Chuan-Tung Lin, Jonghyun Oh, Mingoo Seok

Abstract:

A digital computing-in-memory (DCIM) macro emerges as a promising building block in a deep neural network (DNN) accelerator. To better support DNN workloads, circuit designers aim to improve three main metrics for macros: energy efficiency, compute density, and weight density. Improvements in those metrics directly translate into reduced energy consumption, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3694927
Publisher: IEEE

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FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability

FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability 150 150
Author(s): Mohammad Khairul Bashar, T. H. Pantha, Z. Li, M. Farasat, S. Datta, V. Narayanan, S. Dutta, N. Shukla

Abstract:

In-memory compute kernels present a promising approach for addressing data-centric workloads. However, their scalability—particularly for computationally intensive tasks solving combinatorial optimization problems such as Boolean satisfiability (SAT), which are inherently difficult to decompose—remains a significant challenge. In this work, we propose a ferroelectric nonvolatile memory (NVM)-based compute-in-memory …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 81 – 89
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3603942
Publisher: IEEE

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