Computation-in-memory (CIM)

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Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture

Comparative Analysis of Sense Amplifier Circuits for Hybrid CMOS-MTJ CIM Architecture 150 150
Author(s): Yashvardhan Singh, Siddharth Penumatsa, Prashanth Barla

Abstract:

Spin-transfer torque magnetic tunnel junction (STT-MTJ) is widely recognized as a promising device for computation-in-memory (CIM) architecture due to its advantages, such as simple nonvolatile structure, CMOS compatibility, and scalability. In spite of the advantages, achieving reliable and efficient sensing of STT-MTJ remains a design challenge. This work presents a …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 95 – 103
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3690460
Publisher: IEEE

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A Novel VGSOT-pMTJ Write Circuit for Hybrid CMOS/MTJ CIM Architecture

A Novel VGSOT-pMTJ Write Circuit for Hybrid CMOS/MTJ CIM Architecture 150 150
Author(s): Prashanth Barla, Ramya Moodakare

Abstract:

Hybrid computation-in-memory (CIM) architecture has emerged as the most promising alternative to overcome the drawbacks of the conventional CMOS-only devices used in the conventional von-Neumann architecture. In the hybrid CIM architecture, a pair of perpendicular magnetic tunnel junctions (pMTJs) is used to store one bit of information. Though there are …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 65 – 69
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3679830
Publisher: IEEE

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