CMOS

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A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS

A 0.32-pJ/b 100-Gb/s PAM-4 TIA in 28-nm CMOS 150 150
Author(s): Chongyun Zhang, Li Wang, Fuzhan Chen, C. Patrick Yue

Abstract:

This letter presents a 0.32 pJ/bit 100-Gb/s PAM-4 CMOS transimpedance amplifier (TIA). Several techniques are proposed to alleviate TIA design tradeoffs while pushing energy efficiency to a limit. A multipeaking input network is designed to relieve the bandwidth (BW) degradation from parasitics of input interface and ESD diodes. An …

Published in: IEEE Solid-State Circuits Letters
Page(s): 273 – 276
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3603569
Publisher: IEEE

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A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers

A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers 150 150
Author(s): Chenxin Liu, Yudai Yamazaki, Anyi Tian, Chun Wang, Hans Herdian, Abanob Shehata, Han Nie, Minzhe Tang, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada

Abstract:

This work presents a D-band bi-directional CMOS double-balanced mixer (DBM) supporting data rates over 160 Gb/s with a 58-GHz RF bandwidth (112–170 GHz). The mixer employs four identical NMOS passive switches ( $12~\mu $ m/60 nm) in a DBM topology, providing the isolation between RF, LO, and IF ports. Both IF and RF …

Published in: IEEE Solid-State Circuits Letters
Page(s): 241 – 244
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3597690
Publisher: IEEE

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A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS

A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS 150 150
Author(s): Chun-Sheng Lin, Chih-Hsueh Lin, Chun-Hsing Li

Abstract:

A 240-GHz direct-conversion transmitter (TX), consisting of an LO chain and fundamental I/Q mixers, is proposed for sub-THz communication applications. The LO chain integrates phase-shifter-embedded impedance matching networks (IMNs) and frequency tripler with an optimized harmonic IMN, delivering I/Q LO signals at 240 GHz with high output power, 360° phase …

Published in: IEEE Solid-State Circuits Letters
Page(s): 225 – 228
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3592246
Publisher: IEEE

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A 0.7-V Multiclass Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22-nm CMOS

A 0.7-V Multiclass Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22-nm CMOS 150 150
Author(s): Edoardo Baiesi Fietta, David Seebacher, Davide Ponton, Andrea Bevilacqua

Abstract:

This letter presents a multiclass, asymmetric digital Doherty power amplifier (DDPA) for Bluetooth low energy (BLE) applications, that achieves high efficiency at full-scale as well as at 8.6-dB back-off using a single 0.7-V supply voltage. The proposed DDPA is made of two power-combined switched-capacitor power amplifiers (SCPAs) and uses an …

Published in: IEEE Solid-State Circuits Letters
Page(s): 217 – 220
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3591570
Publisher: IEEE

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A 302.5-GHz 30.9-dB-Gain THz Amplifier in 65-nm CMOS

A 302.5-GHz 30.9-dB-Gain THz Amplifier in 65-nm CMOS 150 150
Author(s): Yu-Kai Chen, Yi-Fan Tseng, Wei-Zhe Su, Chun-Hsing Li

Abstract:

A 302.5-GHz high-gain CMOS THz amplifier is proposed in this work. An electromagnetic (EM) modeling approach, verified by transistor measurements, is employed to optimize transistor layout, effectively reducing gate resistance and drain-to-gate capacitance. This significantly enhances the transistor’s maximum oscillation frequency $f_{mathrm {max }}$ from 239.7 to 367.5 GHz. Furthermore, a $…

Published in: IEEE Solid-State Circuits Letters
Page(s): 165 – 168
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3574413
Publisher: IEEE

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