A W-Band Active Bidirectional Phase Shifter With 2° RMS Phase Error Over 26.4% FBW Using Back-Gate Biasing in 28-nm FD-SOI CMOS https://sscs.ieee.org/wp-content/themes/movedo/images/empty/thumbnail.jpg 150 150 https://secure.gravatar.com/avatar/8fcdccb598784519a6037b6f80b02dee03caa773fc8d223c13bfce179d70f915?s=96&d=mm&r=g
Abstract:
This article presents a W-band active bidirectional vector-sum phase shifter (Bi-VSPS) using a bidirectional phase-inverting variable-gain amplifier (Bi-PIVGA) with back-gate biasing in 28-nm fully depleted silicon-on-insulator (FD-SOI) CMOS. The Bi-PIVGA employs a neutralization technique that cancels the gate-to-drain capacitances of both active and inactive transistors in each signal direction. By …