Approximate computing

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A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference

A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference 150 150
Author(s): Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Haitao Wang, Qihao Liu, Zhiming Chen, Hao Wu, Jinshan Yue, Shidong Lv, Xinghua Wang, Pui-In Mak, Xiaoran Li, Feng Zhang

Abstract:

Static random-access memory (SRAM)-based computing-in-memory (CIM) macros have been widely studied to improve the energy efficiency of edge artificial intelligence (AI) inference tasks. However, less attention has been given to AI training, which requires CIM macros to not only perform matrix multiply-accumulate (MAC) operations but also support matrix transposition. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3679560
Publisher: IEEE

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An Approximate Digital CIM Macro With Low-Power Multiply-Add Units and Dynamic Sparse-Adaptive Configuring for Edge AI Inference

An Approximate Digital CIM Macro With Low-Power Multiply-Add Units and Dynamic Sparse-Adaptive Configuring for Edge AI Inference 150 150
Author(s): Xiaofeng Li, Yi Zhan, Purui Zhu, Rui Zhou, Jiayin Song, Heng You, Yumei Zhou, Shushan Qiao

Abstract:

This letter presents an approximate digital compute-in-memory (CIM) macro for low-power edge AI inference. It introduces three hierarchical innovations: 1) novel fused approximate multiply-add units (FAMUs) that reduces power and area consumption; 2) a bit-critical weight allocation architecture that optimally balances accuracy and hardware cost; and 3) a dynamic sparsity-adaptive configuration method to …

Published in: IEEE Solid-State Circuits Letters
Page(s): 45 – 48
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3652570
Publisher: IEEE

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IRIS: An Energy-Efficient Spatial Computing SoC for Real-Time Interactive Rendering and Modeling With Surface-Aware 3-D Gaussian Splatting

IRIS: An Energy-Efficient Spatial Computing SoC for Real-Time Interactive Rendering and Modeling With Surface-Aware 3-D Gaussian Splatting 150 150
Author(s): Seokchan Song, Seryeong Kim, Wonhoon Park, Jongjun Park, Sanghyuk An, Gwangtae Park, Minseo Kim, Hoi-Jun Yoo

Abstract:

The 3-D Gaussian splatting (3DGS), based on a machine learning-driven radiance field technique, is rapidly emerging as a next-generation solution in 3-D graphics. Owing to its short modeling time, computational simplicity, and high rendering quality, it is expected to replace traditional 3-D graphics on edge devices. However, its substantial memory …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3613707
Publisher: IEEE

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Fully Analog, Multi-Lag, RF Correlators for Code-Domain Radars Using Margin Propagation

Fully Analog, Multi-Lag, RF Correlators for Code-Domain Radars Using Margin Propagation 150 150
Author(s): Aswin Undavalli, Kareem Rashed, Abdul Rakib Hossain, Gert Cauwenberghs, Shantanu Chakrabartty, Arun Natarajan, Aravind Nagulu

Abstract:

We present a fully analog, multiplier-free, sampled-domain RF correlator to achieve high energy efficiency for radar workloads. The RF correlator employs a split-source follower architecture that leverages the margin propagation (MP) computing paradigm in the sampled domain. As a proof of concept, we implement a $256 \times 256$ fully analog cross correlator …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3602920
Publisher: IEEE

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