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A 16× Interleaved 32-GS/s 8b Hybrid ADC With Self-Tracking Inter-Stage Gain Achieving 44.3-dB SFDR at 20.9-GHz Input

A 16× Interleaved 32-GS/s 8b Hybrid ADC With Self-Tracking Inter-Stage Gain Achieving 44.3-dB SFDR at 20.9-GHz Input 150 150
Author(s): Hongzhi Liang, Jun Chang, Yixiao Luo, Li Dang, Haolin Han, Yi Shen, Dengquan Li, Shubin Liu, Ruixue Ding, Zhangming Zhu

Abstract:

This article presents a 32-GS/s 16-channel hierarchical time-interleaved (TI) hybrid analog-to-digital converter (ADC). The prototype utilizes the intrinsic high-speed quantization of time-domain (TD) ADC to reduce the interleaving factor. By incorporating hierarchical sampling and a cascode sampler, the compact TI-ADC achieves 44.3-dB spurious-free dynamic range (SFDR) at 20.9-GHz input. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3680919
Publisher: IEEE

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A 3nm Fin-FET 19.87-Mbit/mm2 2RW Pseudo Dual-Port 6T SRAM With Metal Wire-R Tracking and Sequential Access-Aware Dynamic Power Reduction

A 3nm Fin-FET 19.87-Mbit/mm2 2RW Pseudo Dual-Port 6T SRAM With Metal Wire-R Tracking and Sequential Access-Aware Dynamic Power Reduction 150 150
Author(s): Tomotaka Tanaka, Koji Nii, Yuichiro Ishii, Makoto Yabuuchi, Yumito Aoyagi, Masaya Hamada, Kazuto Mizutani, Hidehiro Fujiwara, Isabel Wang, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

Abstract:

This article presents a 2-read/write (2RW) pseudo dual-port (PDP) static random access memory (SRAM) macro implemented in advanced 3nm Fin-FET technology, achieving a competitive bit density of 19.87Mbit/mm2 for advanced nodes. To address challenges in process scaling, reliability under process voltage temperature variations, and dynamic power consumption, two …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3682256
Publisher: IEEE

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A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators

A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators 150 150
Author(s): Ali Mostafa, Emmanuel Hardy, Franck Badets

Abstract:

This work presents an injection-locked oscillator (ILO)-based feature extraction (FEx) system. It combines voltage- and time-domain signal processing to implement a power-efficient programmable gain amplifier (PGA) and a small-footprint, high-selectivity ILO-based voltage-to-time converter bandpass filter (VTC-BPF) bank and rectifier. The VTC-BPF enables direct analog-to-time conversion, eliminating the need for …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3681481
Publisher: IEEE

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A Continuous-Time Zoom Sensor Readout Frontend With Fast Tracking and Floating-Gm-CCO Integrator

A Continuous-Time Zoom Sensor Readout Frontend With Fast Tracking and Floating-Gm-CCO Integrator 150 150
Author(s): Haoyang Luo, Zongnan Wang, Jiarui Wang, Bingrui Li, Zilong Shen, Yang Liu, Xiaojie Duan, Yuan Wang, Xiyuan Tang

Abstract:

Emerging edge applications processing weak signals in noisy environments demand sensor readout frontends with low noise, low power, high dynamic range (DR), and high input impedance. This article presents a zoom sensor readout frontend design that can track signals with rapid changes over a wide DR with high energy efficiency. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3677053
Publisher: IEEE

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A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference

A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference 150 150
Author(s): Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Haitao Wang, Qihao Liu, Zhiming Chen, Hao Wu, Jinshan Yue, Shidong Lv, Xinghua Wang, Pui-In Mak, Xiaoran Li, Feng Zhang

Abstract:

Static random-access memory (SRAM)-based computing-in-memory (CIM) macros have been widely studied to improve the energy efficiency of edge artificial intelligence (AI) inference tasks. However, less attention has been given to AI training, which requires CIM macros to not only perform matrix multiply-accumulate (MAC) operations but also support matrix transposition. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3679560
Publisher: IEEE

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A Reconfigurable Multimode Readout IC for Nonconductive and Capacitive Sensing With 33.9-dB SNR on 6.5-in AMOLED Panels

A Reconfigurable Multimode Readout IC for Nonconductive and Capacitive Sensing With 33.9-dB SNR on 6.5-in AMOLED Panels 150 150
Author(s): Sang Weun Kim, Jun Seong Kim, Dabin Yun, Seunghoon Ko

Abstract:

This letter presents a multimode readout IC for 6.5-in 34Tx/16Rx on-cell touch AMOLED (OCTA) panels, detecting both conductive and nonconductive objects (NCos) without panel modifications. To enable this dual detection, a reconfigurable analog front-end (AFE) is proposed, functioning as either a capacitance-to-voltage converter or a triboelectric charge sampler. In …

Published in: IEEE Solid-State Circuits Letters
Page(s): 129 – 132
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3680164
Publisher: IEEE

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Advancing On-Cell Near-Field Monitoring for Thermal Runaway Detection in EV Batteries

Advancing On-Cell Near-Field Monitoring for Thermal Runaway Detection in EV Batteries 150 150
Author(s): Simon Foster, Scott Block, Daniel McMitchell, Edgar Colin-Beltran, Robert Dailey

Abstract:

A cell monitoring system for performance and safety enhancement is presented. It is the first commercially available single-chip-on-cell near-field contactless solution for automotive battery management, simplifying pack interconnect and reducing points of failure. This letter is a companion paper to the earlier ISSCC paper. It provides further details on the …

Published in: IEEE Solid-State Circuits Letters
Page(s): 369 – 372
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3634340
Publisher: IEEE

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A “No Gain” Direct-Conversion IQ RF-to-Bits Receiver Without Active Linear Amplification

A “No Gain” Direct-Conversion IQ RF-to-Bits Receiver Without Active Linear Amplification 150 150
Author(s): Jeroen Ponte, Roel Plompen, Emiel Zijlma, Eric A. M. Klumperink, Harijot Singh Bindra, Bram Nauta

Abstract:

This work describes a direct-conversion IQ receiver (RX) that does not utilize any active linear (power) amplification, covering its design considerations, prototype implementation, and measurement verification. Only RLC components, MOS transistor (MOST) switches, and comparators are used, leading to several unique design challenges. Key among these are the fact that …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3611114
Publisher: IEEE

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