Analog computing

  • No Comments

PERCEL: A Rewritable NVM CIM Incorporating a CTT-Based Per-Cell DAC

PERCEL: A Rewritable NVM CIM Incorporating a CTT-Based Per-Cell DAC 150 150
Author(s): Samyak Chakrabarty, Vinod Jacob, Mohammadreza Zeinali, Georgios Karfakis, Siyun Qiao, Ziyi Guo, Puneet Gupta, Subramanian Iyer, Sudhakar Pamarti

Abstract:

Compute-in-memory (CiM) accelerators perform matrix vector multiplications (MVMs) directly inside memory arrays, reducing data movement and improving both energy efficiency and throughput for artificial intelligence (AI) workloads. To reduce the number of conversions, recent designs use multibit compute cells. Nevertheless, practical multibit CiM still faces a tension among accuracy, efficiency, …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 70 – 77
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3680497
Publisher: IEEE

View on IEEE Xplore

  • No Comments

AACIM: A 2785-TOPS/W, 161-TOP/mm2, <1.17%-RMSE, Analog-In Analog-Out Computing-In-Memory Macro in 28 nm

AACIM: A 2785-TOPS/W, 161-TOP/mm2, <1.17%-RMSE, Analog-In Analog-Out Computing-In-Memory Macro in 28 nm 150 150
Author(s): Rentao Wan, Chuan-Tung Lin, Bo Zhang, Yannis Tsividis, Mingoo Seok

Abstract:

This article presents an analog-in analog-out CIM macro (AACIM) for use in analog deep neural network (DNN) processors. Our macro receives analog inputs, performs a 64-by-32 vector–matrix multiplication (VMM) with a current-discharging computation mechanism, and produces analog outputs. It stores a 4-bit weight as an analog voltage in the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3622309
Publisher: IEEE

View on IEEE Xplore

  • No Comments

Fully Analog, Multi-Lag, RF Correlators for Code-Domain Radars Using Margin Propagation

Fully Analog, Multi-Lag, RF Correlators for Code-Domain Radars Using Margin Propagation 150 150
Author(s): Aswin Undavalli, Kareem Rashed, Abdul Rakib Hossain, Gert Cauwenberghs, Shantanu Chakrabartty, Arun Natarajan, Aravind Nagulu

Abstract:

We present a fully analog, multiplier-free, sampled-domain RF correlator to achieve high energy efficiency for radar workloads. The RF correlator employs a split-source follower architecture that leverages the margin propagation (MP) computing paradigm in the sampled domain. As a proof of concept, we implement a $256 \times 256$ fully analog cross correlator …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3602920
Publisher: IEEE

View on IEEE Xplore

Search this website