IEEE Solid-State Circuits Magazine

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Don’t Fear the Doublet [Shop Talk: What You Didn’t Learn in School]

Don’t Fear the Doublet [Shop Talk: What You Didn’t Learn in School] 150 150
Author(s): Chris Mangelsdorf

Abstract:

While rummaging around in the long-forgotten basement of the psyche, psychiatrist Carl Jung discovered a collection of primitive fears and instincts left there by our distant ancestors. This box, labeled “collective unconscious,” contained all the terrors that confronted primitive humans. These fears are still with us, ingrained in our beliefs …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 16 – 21
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3707281
Publisher: IEEE

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Doherty Power Amplifiers: Fundamentals and recent advances

Doherty Power Amplifiers: Fundamentals and recent advances 150 150
Author(s): Taiyun Chi, Qiang Zhou, Hao Guo, Xiaohan Zhang

Abstract:

The Doherty power amplifier (PA), invented in 1936, remains a dominant PA architecture for achieving high energy efficiency under high peak-to-average power ratio (PAPR) signals. This article offers a tutorial review of the Doherty PA, from its foundational principles to the latest silicon implementations. The two classical architectures, i.e., the …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 44 – 54
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3699837
Publisher: IEEE

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Embedded SRAM Design in Technologies Beyond FinFET: An overview

Embedded SRAM Design in Technologies Beyond FinFET: An overview 150 150
Author(s): Zheng Guo

Abstract:

With the advent of gate-all-around (GAA) technologies, the discretization of transistor width known to FinFET technologies is no longer required. This enables additional flexibility to optimize embedded memory and logic designs through extensive design technology co-optimization (DTCO). Furthermore, power supply from the backside is becoming available and opens additional design-optimization …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 73 – 80
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3702581
Publisher: IEEE

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Principles and Practices of High-Speed DAC Design: From Conversion Fundamentals to Layout-Aware Implementation

Principles and Practices of High-Speed DAC Design: From Conversion Fundamentals to Layout-Aware Implementation 150 150
Author(s): Shiyu Su

Abstract:

High-speed DACs are now central to direct-RF transmitters, wireline links, synthesizers, instrumentation, quantum computers, and many other bandwidth-hungry mixed-signal systems. In practice, the usable performance of a modern DAC is determined by a multidimensional tradeoff among linearity, noise, bandwidth, output power, power and area efficiency, and circuit complexity (i.e., …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 26 – 43
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3704105
Publisher: IEEE

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Fundamentals of Energy-Efficient LDO Regulator Design: From dropout optimization to wide-bandwidth and high-PSR techniques

Fundamentals of Energy-Efficient LDO Regulator Design: From dropout optimization to wide-bandwidth and high-PSR techniques 150 150
Author(s): Hyun-Sik Kim

Abstract:

Low-dropout (LDO) regulators are often dismissed as energy-inefficient power-management blocks, yet—when deployed as intended—they can deliver more than 90% efficiency. This tutorial revisits the fundamentals of energy-efficient LDO design through two coupled goals: minimizing the dropout voltage to improve heavy-load efficiency and minimizing the quiescent current to preserve light-load …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 55 – 72
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3696588
Publisher: IEEE

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The Design of a Clock and Data Recovery Circuit [The Analog Mind]

The Design of a Clock and Data Recovery Circuit [The Analog Mind] 150 150
Author(s): Behzad Razavi

Abstract:

This article describes the transistor-level design of a 56-Gb/s clock and data recovery circuit. We begin with general principles related to clock recovery, introduce the Alexander phase detector, and present the overall architecture. We then summarize the simulation results in 28-nm CMOS technology.

Published in: IEEE Solid-State Circuits Magazine
Page(s): 11 – 116
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3706674
Publisher: IEEE

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Artificial Intelligence-Assisted IC Design: Large language models and agentic systems for modern chip design

Artificial Intelligence-Assisted IC Design: Large language models and agentic systems for modern chip design 150 150
Author(s): Chenhui Deng, Chia-Tung Ho, Haoxing Ren

Abstract:

Artificial intelligence (AI) is increasingly influencing IC design, driven by the growing complexity of modern systems and the need for higher design productivity. Among recent AI advances, large language models (LLMs) have emerged as a particularly powerful class of techniques for AI-assisted IC design, enabling high-level reasoning over natural language …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 41 – 51
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3668144
Publisher: IEEE

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Artificial Intelligence for RFIC Design: Early Advancements, Opportunities, and Challenges: From discovering nonintuitive design spaces to accelerated RFIC designs

Artificial Intelligence for RFIC Design: Early Advancements, Opportunities, and Challenges: From discovering nonintuitive design spaces to accelerated RFIC designs 150 150
Author(s): Kaushik Sengupta, Jonathan Zhou, Juho Park, Emir Ali Karahan, Jiajun Tang, Sherif Ghozzy, Muhamed Allam

Abstract:

When AlphaGo played its now-famous Move 37 against Lee Sedol in 2016, the moment stood out not simply because it led to a win, but because the move did not resemble the human games the system had been trained on. It was neither copied from precedent nor the result of explicit instruction; …

Published in: IEEE Solid-State Circuits Magazine
Page(s): 52 – 68
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3680917
Publisher: IEEE

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Analog Design Experiments With AI—Part 2 [The Analog Mind]

Analog Design Experiments With AI—Part 2 [The Analog Mind] 150 150
Author(s): Behzad Razavi

Abstract:

In the previous article [1], we assessed the analytical abilities of ChatGPT for basic circuits. In this article, we extend our effort toward circuit design by asking artificial intelligence (AI) to predict performance trends. As in the previous article, we give a score from zero to four to AI’s answers.

Published in: IEEE Solid-State Circuits Magazine
Page(s): 8 – 13
Year of Publication: 2026
Electronic ISSN: 1943-0590
DOI: 10.1109/MSSC.2026.3686589
Publisher: IEEE

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