Antennas

  • No Comments

A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation

A 256-Element Slepian Beamforming Accelerator With Analog Compute-In-Memory Multiplication and Accumulation 150 150
Author(s): Wei-Chun Wang, Shida Zhang, Coleman DeLude, Laith Shamieh, Nael Mizanur Rahman, Isha Chakraborty, Justin Romberg, Saibal Mukhopadhyay

Abstract:

An analog compute-in-memory (CIM) Slepian beamforming (SBF) accelerator is introduced for large-scale multi-input–multi-output (MIMO). The design performs complex-valued vector–matrix multiplication in the analog domain to project 256 I/Q inputs into a low-dimensional Slepian subspace and uses a digital backend with 4-tap FIR filters to generate one output beam. …

Published in: IEEE Solid-State Circuits Letters
Page(s): 154 – 157
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3690381
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 760 mVPP-Input-Range, 103.6dB-SNDR Direct-Digitization Sensor Readout With Pseudo-Differential Integrator and Impedance-Equalized RDAC

A 760 mVPP-Input-Range, 103.6dB-SNDR Direct-Digitization Sensor Readout With Pseudo-Differential Integrator and Impedance-Equalized RDAC 150 150
Author(s): Kaiwen Zhou, Jianhong Zhou, Yijie Li, Yuying Li, Tian Dong, Zhiliang Hong, Jiawei Xu

Abstract:

A high-precision, direct-digitization sensor readout (DD-RO) based on a continuous-time delta-sigma modulator (CT- $\Delta \Sigma $ M) is presented. The proposed DD-RO incorporates several key innovations to enhance performance. First, a pseudo-differential current-balancing integrator (PD-CBI) significantly extends the linear input range, whereas its intrinsically limited common-mode input range and CMRR are …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3686843
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 3.47 NEF 175.2-dB FoMs Direct Digitization Front-End Featuring Delta Amplification Noise-Shaping SAR ADC for Biosignal Acquisition

A 3.47 NEF 175.2-dB FoMs Direct Digitization Front-End Featuring Delta Amplification Noise-Shaping SAR ADC for Biosignal Acquisition 150 150
Author(s): Kyeongwon Jeong, Can Livanelioglu, Jiawei Liao, Inhee Lee, Taekwang Jang

Abstract:

This article presents a direct-digitization interface for ExG bio-signals’ readout that simultaneously achieves a high dynamic range (DR) and a low noise-efficiency factor (NEF). The proposed delta amplification (DA) and feedback cancellation technique reduce both the input and output ranges of the first amplifier, thus allowing the use of a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3685168
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 10.1-ENOB 8kHz Bandwidth 95–250nW PVT-Robust DT Level-Crossing ADC for Sparse and Generic Signals

A 10.1-ENOB 8kHz Bandwidth 95–250nW PVT-Robust DT Level-Crossing ADC for Sparse and Generic Signals 150 150
Author(s): Jixuan Mou, Pieter Harpe, Alessandro Saccon, Eugenio Cantatore, Marco Fattori

Abstract:

This article presents an event-driven discrete-time level crossing analog-to-digital converter (DT-LCADC) that is energy-efficient in converting both sparse and generic signals and is robust against process voltage and temperature (PVT) variations. The proposed DT-LCADC uses the comparator delay to classify each level-crossing event as slow (produced by a small input …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3683078
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 28-nm System-in-One-Macro Computing-in-Memory Chip Utilizing Leakage-Eliminated 2T1C and Capacitor-Over-Logic 1T1C eDRAM

A 28-nm System-in-One-Macro Computing-in-Memory Chip Utilizing Leakage-Eliminated 2T1C and Capacitor-Over-Logic 1T1C eDRAM 150 150
Author(s): Zhihang Qian, Zhaori Cong, Shengzhe Yan, Zeyu Guo, Zhuoyu Dai, Yifan He, Wenyu Sun, Chunmeng Dou, Feng Zhang, Di Geng, Jinshan Yue, Yongpan Liu, Qi Liu, Ming Liu

Abstract:

Computing-in-memory (CIM) is a promising paradigm for energy- and area-efficient implementation of the heavy general matrix multiplication (GEMM) operations, especially in the evolving deep learning algorithms. Though existing CIM macros have demonstrated remarkable energy/area efficiency, the corresponding metrics of the system-level CIM chips degrade due to the peripheral components, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3684971
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 16× Interleaved 32-GS/s 8b Hybrid ADC With Self-Tracking Inter-Stage Gain Achieving 44.3-dB SFDR at 20.9-GHz Input

A 16× Interleaved 32-GS/s 8b Hybrid ADC With Self-Tracking Inter-Stage Gain Achieving 44.3-dB SFDR at 20.9-GHz Input 150 150
Author(s): Hongzhi Liang, Jun Chang, Yixiao Luo, Li Dang, Haolin Han, Yi Shen, Dengquan Li, Shubin Liu, Ruixue Ding, Zhangming Zhu

Abstract:

This article presents a 32-GS/s 16-channel hierarchical time-interleaved (TI) hybrid analog-to-digital converter (ADC). The prototype utilizes the intrinsic high-speed quantization of time-domain (TD) ADC to reduce the interleaving factor. By incorporating hierarchical sampling and a cascode sampler, the compact TI-ADC achieves 44.3-dB spurious-free dynamic range (SFDR) at 20.9-GHz input. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3680919
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators

A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators 150 150
Author(s): Ali Mostafa, Emmanuel Hardy, Franck Badets

Abstract:

This work presents an injection-locked oscillator (ILO)-based feature extraction (FEx) system. It combines voltage- and time-domain signal processing to implement a power-efficient programmable gain amplifier (PGA) and a small-footprint, high-selectivity ILO-based voltage-to-time converter bandpass filter (VTC-BPF) bank and rectifier. The VTC-BPF enables direct analog-to-time conversion, eliminating the need for …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3681481
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A 3nm Fin-FET 19.87-Mbit/mm2 2RW Pseudo Dual-Port 6T SRAM With Metal Wire-R Tracking and Sequential Access-Aware Dynamic Power Reduction

A 3nm Fin-FET 19.87-Mbit/mm2 2RW Pseudo Dual-Port 6T SRAM With Metal Wire-R Tracking and Sequential Access-Aware Dynamic Power Reduction 150 150
Author(s): Tomotaka Tanaka, Koji Nii, Yuichiro Ishii, Makoto Yabuuchi, Yumito Aoyagi, Masaya Hamada, Kazuto Mizutani, Hidehiro Fujiwara, Isabel Wang, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang

Abstract:

This article presents a 2-read/write (2RW) pseudo dual-port (PDP) static random access memory (SRAM) macro implemented in advanced 3nm Fin-FET technology, achieving a competitive bit density of 19.87Mbit/mm2 for advanced nodes. To address challenges in process scaling, reliability under process voltage temperature variations, and dynamic power consumption, two …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 11
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3682256
Publisher: IEEE

View on IEEE Xplore

  • No Comments

A Continuous-Time Zoom Sensor Readout Frontend With Fast Tracking and Floating-Gm-CCO Integrator

A Continuous-Time Zoom Sensor Readout Frontend With Fast Tracking and Floating-Gm-CCO Integrator 150 150
Author(s): Haoyang Luo, Zongnan Wang, Jiarui Wang, Bingrui Li, Zilong Shen, Yang Liu, Xiaojie Duan, Yuan Wang, Xiyuan Tang

Abstract:

Emerging edge applications processing weak signals in noisy environments demand sensor readout frontends with low noise, low power, high dynamic range (DR), and high input impedance. This article presents a zoom sensor readout frontend design that can track signals with rapid changes over a wide DR with high energy efficiency. …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3677053
Publisher: IEEE

View on IEEE Xplore

Search this website