Distinguished Lecturer Roster
"Everyone has been impressed by the vibrant and informative presentations of these renowned distinguished lecturers and valued the unique opportunity of having intimate technical discussions and exchanging ideas with such internationally recognized experts."
- Shahriar Mirabbasi, Chapter Chair of Vancouver SSCS, CPMT, and CESOC Joint Chapter, May 2015.
Terms through 31 December 2023

Dr. Qun Jane Gu has received the Ph.D. from University of California, Los Angeles in 2007. After a couple years of industry experience, she started her academia career in 2010 at the University of Florida. Since 2012, she has been with the University of California, Davis, where she is currently a professor. Dr. Jane Gu’s group is passionate in high performance RF, mm-wave and THz integrated circuits and systems and its broad applications. The works from her group have won nine best paper awards from international conferences. She has received 2013 NSF CAREER award, 2015 UC Davis Outstanding Junior Faculty Award, 2017 and 2018 Qualcomm Faculty Award, and 2019 UC Davis Chancellor Fellow. She is a TPC member of solid-state circuits conferences RFIC, CICC and ISSCC.
Presentation | Abstract |
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THz Interconnect, Complement to Electrical and Optical Interconnects | Read Abstract |

Robert Henderson (M’82, SM’14, F’21) is a Professor of Electronic Imaging in the School of Engineering at the University of Edinburgh. He obtained his PhD in 1990 from the University of Glasgow. From 1991, he was a research engineer at the Swiss Centre for Microelectronics, Neuchatel, Switzerland. In 1996, he was appointed senior VLSI engineer at VLSI Vision Ltd, Edinburgh, UK where he worked on the world’s first single chip video camera. From 2000, as principal VLSI engineer in STMicroelectronics Imaging Division he developed image sensors for mobile phone applications. He joined University of Edinburgh in 2005, designing the first SPAD image sensors in nanometer CMOS technologies in the MegaFrame and SPADnet EU projects. This research activity led to the first volume SPAD time-of-flight products in 2013 in the form of STMicroelectronics Flightsense series which perform an autofocus assist function in more than 150 different smartphone models, recently passing the 1 billion module milestone. He benefits from a long term research partnership with STMicroelectronics in which he explores medical, scientific and high speed imaging applications of SPAD technology. In 2014, he was awarded a prestigious ERC advanced fellowship. He is a Fellow of the Royal Society of Edinburgh.
Presentation | Abstract |
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3D Stacked CMOS SPAD Image Sensors | Read Abstract |
Biomedical and Scientific Imaging with CMOS SPAD Sensors | Read Abstract |
Direct Time of Flight LIDAR with CMOS SPAD Arrays | Read Abstract |

Presentation | Abstract |
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Advanced Modeling and Simulation of State-of-the-Art High-Speed I/O Interfaces | Read Abstract |
Efficient Simulation of Analog/Mixed-Signal Circuits in SystemVerilog with Auto-Generated Models | Read Abstract |
Introduction to Silicon Photonics Systems and Their Modeling | Read Abstract |

Tony Tae-Hyoung Kim (Senior Member, IEEE) received the B.S. and M.S. degrees in electrical engineering from Korea University, Seoul, South Korea, in 1999 and 2001, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Minnesota, Minneapolis, MN, USA, in 2009. From 2001 to 2005, he was with Samsung Electronics, Hwasung, South Korea. In 2009, he joined Nanyang Technological University, Singapore, where he is currently an Associate Professor.
He has published over 190 papers in journals and conferences and holds 20 U.S. and Korean patents registered. His current research interests include computing-in-memory for machine learning, ultra-low power circuits and systems for smart edge computing, low-power and high-performance digital, mixed-mode, and memory circuit design, variation-tolerant circuits and systems, and emerging memory circuits for neural networks.
Dr. Kim received IEEE ISSCC Student Travel Grant Award in 2022 and 2019, Best Paper Award (Gold Prize) in IEEE/IEIE ICCE-Asia2021, Korean Federation of Science and Technology (KOFST) Award in 2021, Best Demo Award at APCCAS2016, Low Power Design Contest Award at ISLPED2016, Best Paper Awards at 2014 and 2011 ISOCC, AMD/CICC Student Scholarship Award at IEEE CICC2008, DAC/ISSCC Student Design Contest Award in 2008, Samsung Humantech Thesis Award in 2008, 2001, and 1999, and ETRI Journal Paper of the Year Award in 2005. He was the Chair of the IEEE Solid-State Circuits Society Singapore Chapter in 2015-2016 and is Chair-Elect/Secretary of the IEEE Circuits and Systems Society VSATC. He has served on numerous IEEE conferences as a Committee Member. He serves as a Corresponding Guest Editor for the IEEE JOURNAL on EMERGING and SELECTED TOPICS in CIRCUITS and SYSTEMS (JETCAS), a Guest Editor for the IEEE TRANSACTIONS on BIOMEDICAL CIRCUITS and SYSTEMS (TBioCAS), an Associate Editor for the IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS and IEEE ACCESS.
Presentation | Abstract |
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Design of computing-in-memory: Analog vs. Digital | Read Abstract |
Minimum-energy-driven embedded memory design for IoT applications | Read Abstract |
Tiny ML accelerator design for IoT applications: Challenges and Trends | Read Abstract |

Presentation | Abstract |
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Design of ultra-low-distortion band-pass filters and sinusoidal oscillators | Read Abstract |
Maximizing the Data Rate of an Inductively Coupled Chip-to-Chip Link by Resetting the Channel State Variables | Read Abstract |
Multi-channel Analog-to-Digital Conversion Using Delta-Sigma Modulators Without Reset | Read Abstract |
Wide Tuning-Range VCOs Using Multi-Mode Resonators | Read Abstract |

Dr. Hanh-Phuc Le is an Assistant Professor of ECE at the University of California San Diego and a co-Director of the Power Management Integration Center, an NSF IUCRC center. He received the Ph.D. degree from UC Berkeley (2013), M.S. from KAIST, Korea (2006), and B.S. from Hanoi University of Science and Technology in Vietnam (2003), all in Electrical Engineering. In 2012, he co-founded and served as the CTO at Lion Semiconductor until October 2015. The company was acquired by Cirrus Logic in 2021. He was with the University of Colorado Boulder from 2016 to 2019, before joining the ECE department at UC San Diego. He held R&D positions at Oracle, Intel, Rambus, JDA Tech in Korea and the Vietnam Academy of Science and Technology (VAST) in Vietnam. His current research interests include miniaturized/on-die power conversions, large conversion ratios, smart power delivery and control for high performance IT systems, data centers, telecommunication, robots, automotive, mobile, wearable, and IoT applications.
Presentation | Abstract |
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Gate Driver Circuits for Multi-Level Power Converters | Read Abstract |
Integrated Power Converter - A Good Design Flow and Useful Techniques | Read Abstract |
Next-Generation Circuit Architectures for Power-Supply on Chip (PwrSoC) | Read Abstract |

Yoonmyung Lee received a B.S. degree in Electronic and Electrical Engineering from the Pohang University of Science and Technology (POSTECH), Pohang, Korea, in 2004, and his M.S. and Ph.D. degree in Electrical Engineering from the University of Michigan, Ann Arbor, in 2008 and 2012, respectively. From 2012 to 2015, Dr. Lee was with the University of Michigan as a research faculty member. In 2015, he joined Sungkyunkwan University, Suwon, Korea, where he is now an Associate Professor.
Dr. Lee is a recipient of Samsung Scholarship in 2005 and Intel Ph.D. fellowship in 2011. He has been serving as a Technical Program Committee member for Asian Solid-State Circuits Conference (A-SSCC) since 2017, and Custom Integrated Circuits Conference (CICC) since 2020. He also has been serving as an associate editor for IEEE Transactions on Very Large Scale Integration (VLSI) Systems since 2019. His research interests include energy-efficient integrated circuits design for low-power high-performance integrated systems and millimeter-scale wireless sensor systems.
Presentation | Abstract |
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Securing IoT Systems with Cost-Effective Physically Unclonable Functions | Read Abstract |
Tackling Dynamic Power with Low Power and Variation-Tolerant Flip-Flops | Read Abstract |

Yan Lu received his BEng and MSc degrees from South China University of Technology, Guangzhou, China, in 2006 and 2009, respectively, and the PhD degree from the Hong Kong University of Science and Technology (HKUST), Hong Kong, China, in 2013.
In 2014, he joined the State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China, where he is currently an Associate Professor. He has authored/coauthored more than 100 peer-reviewed technical papers and one book entitled CMOS Integrated Circuit Design for Wireless Power Transfer (Springer), and edited one book entitled Selected Topics in Power, RF, and Mixed-Signal ICs (River Publishers). His research interests include wireless power transfer circuits and systems, high density power converters, integrated voltage regulators, and energy-efficient analog circuits.
Dr. Lu was a recipient/co-recipient of the NSFC Excellent Young Scientist Fund (HK-Macau) in 2021, the Macao Science and Technology Award second prizes in both 2018 and 2020, the IEEE Solid-State Circuits Society Pre-Doctoral Achievement Award 2013–2014, the IEEE CAS Society Outstanding Young Author Award in 2017, and the ISSCC 2017 Takuo Sugano Award for Outstanding Far-East Paper. He has served as a Guest Editor for the IEEE TCAS-I in 2019 and the IEEE TCAS-II from 2018 to 2019, a Young Editor of the Journal of Semiconductors since 2021. He is serving as a TPC Member for ISSCC and CICC.
Presentation | Abstract |
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Hybrid Topologies of Device-to-Device Bi-directional Wireless Power Transceiver | Read Abstract |
Integrated Voltage Regulators for Fine-Grained Power Delivery | Read Abstract |

Danilo Manstretta (Member, IEEE) received the MS degree (summa cum laude) and the Ph.D. degree in electrical engineering and computer science from the University of Pavia, Pavia, Italy, in 1998 and 2002, respectively.
From 2001 to 2003 he was with Agere Systems as a Member of Technical Staff, working on WLAN transceivers and linear power amplifiers for base stations.
From 2003 to 2005 he was with Broadcom Corporation, Irvine, CA, working on RF tuners for TV applications.
In 2005 he joined the University of Pavia, where he is now Associate Professor. His research interests are in the field of analog, RF, optical and millimeter-wave integrated circuit design.
Dr. Manstretta has been member of the Steering Committee of the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium since 2017. He was TPC member for the same conference from 2006 to 2021 and he is the TPC co-chair in 2022. Since 2022 he is member of the TPC of ESSCIRC. He was Guest Editor of the IEEE Journal of Solid-State Circuits May 2017 Special Section dedicated to the 2016 RFIC Symposium and Guest Editor of the IEEE Transactions on Microwave Theory and Techniques June 2018 Mini Special Issue dedicated to the 2017 RFIC Symposium. He was co-recipient of the 2003 IEEE Journal of Solid-State Circuits Best Paper Award.
Presentation | Abstract |
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Trans-impedance amplifiers design: from ultra-low-power analog to ultra-wideband RF | Read Abstract |

Carolina Mora Lopez received her Ph.D. degree in Electrical Engineering in 2012 from the KU Leuven, Belgium, in collaboration with imec, Belgium. From 2012 to 2018, she worked at imec as a researcher and analog designer focused on interfaces for neural-sensing applications. During this time, she was the lead analog designer and project leader of the Neuropixels development project which resulted in the conception and fabrication of the Neuropixels 1.0 and 2.0 neural probes. She is currently the principal scientist and team leader of the Circuits & Systems for Neural Interfaces team at imec, which develops circuits and technologies for electrophysiology, neuroprosthetics and BMI. Her research interests include analog and mixed-signal circuit design for sensor, bioelectronic and neural interfaces. Carolina is a senior IEEE member and serves on the technical program committee of the ISSC conference, ISSCC SRP, VLSI circuits symposium, and ESSCIRC conference.
Presentation | Abstract |
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Circuits and technologies for implantable biomedical devices | Read Abstract |

Matteo Perenzoni (M’09, SM’19) graduated in electronics engineering from the University of Padua, Italy, and received the PhD in Physics from University of Ferrara, Italy.
In 2002, he collaborated with the University of Padua on mixed-signal integrated circuit design for channel decoding. In 2004, he joined the Fondazione Bruno Kessler (FBK), Trento, Italy, as a Researcher working at the Integrated Radiation and Image Sensors (IRIS) Research Unit. Meanwhile, he also taught courses on electronics and sensors at the Master and Doctorate School, University of Trento, Trento. In 2014, he was a Visiting Research Scientist with the THz Sensing Group, Microelectronics Department, TU Delft, The Netherlands. From 2017 to 2021 he led the IRIS Research Unit at FBK, working in the field of radiation and image sensors using custom and CMOS technologies. Since 2021 he is with the Sony Europe Technology Development Centre in Trento, Italy, leading the analog IC design team. His research interests include advanced CMOS image sensors with a focus on single-photon detection, THz image sensors, and optimization of analog integrated circuits.
Dr. Perenzoni has been a member of the Technical Program Committee of the European Solid-State Circuit Conference (ESSCIRC), from 2015 to 2021 and of the International Solid-State Circuit Conference (ISSCC) from 2018 to 2022.
Presentation | Abstract |
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Imaging in CMOS technologies using single-photon avalanche diodes | Read Abstract |
One more dimension: 3D range imaging with time-of-flight | Read Abstract |
Sensing beyond visible light with Terahertz radiation | Read Abstract |

Yvain Thonnart received the MS degree from Ecole Polytechnique and an engineering diploma from Telecom Paris, France in 2005. He then joined the Technological Research Division of CEA, the French French Alternative Energies and Atomic Energy Commission, within the CEA-Leti institute until 2019, then within the CEA-List institute. He has led the development of several large research projects for on-chip communications, focusing on the maturation of novel concepts towards industrial adoption, such as communication between multiple voltage and frequency domains, 3D-stacked circuits, and optical on-chip interconnects, leading to more than 70 publications and 10 patents. He is now senior expert on communication and synchronization in systems on chip, and scientific advisor for the mixed-signal design lab. His main research interests include asynchronous logic, networks on chip, physical implementation, emerging technologies integration such as photonics, cryoelectronics and interposers. He is currently serving in the technical program committee of the ISSCC.
Presentation | Abstract |
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On-chip communication : from architectures to circuits | Read Abstract |

Rangharajan Venkatesan is a Senior Research Scientist in the ASIC & VLSI Research group in NVIDIA. He received the B.Tech. degree in Electronics and Communication Engineering from the Indian Institute of Technology, Roorkee in 2009 and the Ph.D. degree in Electrical and Computer Engineering from Purdue University in August 2014. His research interests are in the areas of low-power VLSI design and computer architecture with particular focus in deep learning accelerators, high-level synthesis, and spintronic memories. He has received Best Paper Awards for his work on deep learning accelerators from IEEE/ACM Symposium on Microarchitecture (MICRO) and Journal of Solid-State Circuits (JSSC). His work on spintronic memory design was recognized with the Best Paper Award at the International Symposium on Low Power Electronics and Design (ISLPED), and Best paper nomination at the Design, Automation and Test in Europe (DATE). His paper titled, “MACACO: Modeling and Analysis of Circuits for Approximate Computing”, received the IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Ten Year Retrospective Most Influential Paper Award in 2021. He is a member of the technical program committees of several leading IEEE/ACM conferences including ISSCC, DAC, MICRO, and ISLPED.
Presentation | Abstract |
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Pushing the Energy-efficiency of Deep Learning Accelerators with Hardware-Software Co-design | Read Abstract |
Scalable Deep Neural Network Hardware with Multi-Chip Modules | Read Abstract |

David Wentzloff received a BS in Electrical Engineering from the University of Michigan, and Ph.D. in EE from MIT. Since, 2007 he has been with the University of Michigan, where he is currently an Associate Professor of Electrical Engineering and Computer Science. His research focuses on RF integrated circuits, with an emphasis on ultra-low power design. In 2012, he co-founded Everactive, a fabless semiconductor company developing ultra-low power wireless SoCs, where he is currently the co-CTO.
Presentation | Abstract |
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FASoC: Fully-Autonomous SoC Synthesis | Read Abstract |
Ultra-Low Power Receivers for IoT Applications | Read Abstract |

Wanghua Wu (M’07) received the B.Sc. degree (with honors) from Fudan University, Shanghai, China, in 2004, M.Sc. degree (cum laude) and Ph.D. degree from Delft University of Technology, The Netherlands in 2007 and 2013, respectively, all in electrical engineering.
From 2013 to 2016, she was an RFIC Design Engineer in Marvell, developing high-performance frequency synthesizers for WLAN transceivers. Since 2016, she has been with Samsung Semiconductor Inc. USA. She is currently a Senior Manager and Principal Engineer, focusing on advanced cellular RFIC design. Her research interest is on CMOS frequency synthesis for wireless applications.
She is currently served as the Technical Program Committee member of IEEE International Solid-State Circuits Conference (ISSCC), Custom Integrated Circuits Conference (CICC), and Radio Frequency Integrated Circuits Symposium (RFIC).
Presentation | Abstract |
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Low-Jitter LO Frequency Synthesis for 5G mm-wave Transceiver | Read Abstract |
Recent Trends and Advances in High Performance Fractional-N PLL Design | Read Abstract |
Terms through 31 December 2024

Fatih Hamzaoglu (SM’11) received his Ph.D. degree from the University of Virginia, Charlottesville, in 2002, in Electrical Engineering. After finishing the Ph.D., he joined Technology Development group at Intel Corporation, and since then, he has been working on memory technology developments such as SRAM, eDRAM, MRAM and RRAM. Currently, he’s an Intel Fellow and Director of New In-Package Memory Technologies, IP Design and Product Integration.
He is the author or coauthor of more than 40 papers and inventor/co-inventor of more than 30 patents. Dr. Hamzaoglu served in both VLSI Symposium Circuits Committee and ISSCC Memory Subcommittee between 2013 and 2019.
Presentation | Abstract |
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Journey through the Memory Tunnel: SRAM, (e)DRAM, MRAM and RRAM Array Designs and Applications | Read Abstract |

Firooz Aflatouni (Senior Member, IEEE) received the Ph.D. degree in electrical engineering from the University of Southern California, Los Angeles, CA, USA, in 2011. In 1999, he co-founded Pardis Bargh Company, where he served as the CTO for five years working on the design and manufacturing of inclined-orbit satellite tracking systems. From 2004 to 2006, he was a Design Engineer with MediaWorks Integrated Circuits Inc., Irvine, CA. He was a Post-Doctoral Scholar with the Department of Electrical Engineering, California Institute of Technology, Pasadena, CA. He joined the University of Pennsylvania, Philadelphia, PA, USA, in 2014, where he is currently an Associate Professor with the Department of Electrical and Systems Engineering. His research interests include electronic–photonic co-design and low-power RF and millimeter-wave integrated circuits. Dr. Aflatouni received the 2020 Bell Labs Prize, the Young Investigator Program (YIP) Award from the Office of Naval Research in 2019, the NASA Early Stage Innovation Award in 2019, and the 2015 IEEE Benjamin Franklin Key Award. He is a Distinguished Lecturer of the Solid-State Circuit Society and has served on several IEEE program committees (ISSCC, CICC, and IMS). He is an Associate Editor of the IEEE Open Journal of the Solid-State Circuits Society and currently serves as the chair of IEEE Solid State Circuits Society (SSCS) Philadelphia chapter.
Presentation | Abstract |
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Electronic-photonic co-design; from imaging to optical phase control | Read Abstract |
Integrated photonic deep networks for image classification | Read Abstract |

Sudipto Chakraborty received his B. Tech from Indian Institute of Technology, Kharagpur in 1998 and Ph.D in EE from Georgia Institute of Technology in 2002. He worked as a researcher in Georgia Electronic Design Center (GEDC) till 2004. Since 2004 to 2016, he was a senior member of technical staff at Texas Instruments where he contributed to low power integrated circuit design in more than 10 product families in the areas of automotive, wireless, medical and microcontrollers. Since 2017, he has been working at the IBM T. J. Watson Research Center where he leads the low power circuit design for next generation quantum computing applications using nano CMOS technology nodes. He has authored or co-authored more than 75 papers, two books and holds 76 US patents. He has served in the technical program committees of various conferences including CICC, RFIC, IMS and has been elected as an IBM master inventor in 2022 for his contributions.
Presentation | Abstract |
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Current mode design techniques for low power transceivers | Read Abstract |
Low power cryo-CMOS design for quantum computing applications | Read Abstract |

Masum Hossain (M’11) received the B.Sc. degree from the Bangladesh University of Engineering and Technology, Dhaka, Bangladesh, in 2002, the M.Sc. degree from Queen’s University, Kingston, ON, Canada, in 2005, and the Ph.D. degree from the University of Toronto, Toronto, ON, in 2010. From 2007 to 2013, he worked in product development and industrial research, focusing on high-speed link design in multiple organizations, including Gennum and Rambus. In 2013, he joined the Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada. Recently in 2023, he joined Carleton University in Ottawa, Canada. Dr. Hossain received the Best Student Paper Award at the 2008 IEEE Custom Integrated Circuits Conference and the Analog Device’s Outstanding Student Designer Award in 2010. In 2021 he received EPS society nominated best paper award in IEEE Transaction in Components, Packaging and Manufacturing.
Presentation | Abstract |
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Digital equalization for Multilevel signaling in high-speed SerDes | Read Abstract |
Evolution of the Timing Recovery techniques in High-speed Links | Read Abstract |
Low-jitter flexible frequency generation for next-generation communication systems | Read Abstract |

Ping-Hsuan Hsieh received the B.S. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 2001, and the M.S. and Ph.D. degrees in electrical engineering from the University of California, Los Angeles, Los Angeles, CA, in 2004 and 2009, respectively. From 2009 to 2011, she was with the IBM T.J. Watson Research Center, Yorktown Heights, NY. In 2011 she joined the Electrical Engineering Department of National Tsing Hua University, Hsinchu, Taiwan, where she is currently an Associate Professor. Her research interests focus on mixed-signal integrated circuit designs for high-speed electrical data communications, clocking and synchronization systems, and energy-harvesting systems.
Prof. Hsieh served in the Technical Program Committee of the IEEE International Solid-State Circuits Conference, and is currently a member of the Technical Program Committees of the IEEE Asian Solid-State Circuits Conference and the IEEE Custom Integrated Circuits Conference. She served as an Associate Editor for the IEEE Internet of Things Journal from 2014 to 2018, a Guest Editor for the IEEE Journal of Solid-State Circuits Special Issue in 2021, and is currently an Associate Editor for the IEEE Open Journal of Circuits and Systems and IEEE Solid-State Circuits Letters.
Presentation | Abstract |
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An Overview on Interface Circuits and MPPT for Piezoelectric Energy Harvesting | Read Abstract |

Dongsuk Jeon received a B.S. degree in electrical engineering from Seoul National University, Seoul, South Korea, in 2009 and a Ph.D. degree in electrical engineering from the University of Michigan, Ann Arbor, MI, USA, in 2014. From 2014 to 2015, he was a Post-doctoral Associate with the Massachusetts Institute of Technology, Cambridge, MA, USA. He is currently an Associate Professor with the Graduate School of Convergence Science and Technology, Seoul National University. His current research interests include hardware-oriented machine learning algorithms, hardware accelerators, and low-power circuits.
Presentation | Abstract |
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Designing an optimal hardware solution for deep neural network training | Read Abstract |
When circuits meet machine learning: circuit-based machine learning acceleration and machine learning-based circuit design | Read Abstract |

Joo-Young Kim (Senior Member, IEEE) received the B.S., M.S., and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 2005, 2007, and 2010, respectively.
He is currently an Assistant Professor with the School of Electrical Engineering, KAIST. He is also the Director of the AI Semiconductor Systems Research Center, KAIST. His research interests span various aspects of hardware design, including VLSI design, computer architecture, field-programmable gate array (FPGA), domain-specific accelerators, hardware/software co-design, and agile hardware development. Before joining KAIST, he was a Senior Hardware Engineering Lead at Microsoft Azure, Redmond, WA, USA, working on hardware acceleration for its hyper-scale big data analytics platform named Azure Data Lake. He was also one of the initial members of Catapult project at Microsoft Research, Redmond, where he deployed a fabric of field-programmable gate arrays (FPGAs) in datacenters to accelerate critical cloud services, such as machine learning, data storage, and networking.
Dr. Kim was a recipient of the 2016 IEEE Micro Top Picks Award, the 2014 IEEE Micro Top Picks Award, the 2010 DAC/ISSCC Student Design Contest Award, the 2008 DAC/ISSCC Student Design Contest Award, and the 2006 A-SSCC Student Design Contest Award. He has served as a Guest Editor for the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), a Guest Editor for the IEEE Journal of Solid-State Circuits (JSSC), and an Associate Editor for the IEEE Transactions on Circuits and Systems—I: Regular Papers (TCAS-I).
Presentation | Abstract |
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A Multi-Accelerator Appliance for Accelerating Inference of Hyperscale Transformer Models | Read Abstract |
Processing-in-Memory for AI: From Circuits to Systems | Read Abstract |

Andrea Mazzanti (S’02–M’09–SM’13) received the Laurea and Ph.D. degrees in electrical engineering from the University of Modena and Reggio Emilia, Modena, Italy, in 2001 and 2005, respectively. During the summer of 2003, he was with Agere Systems, Allentown, PA as an Intern. From 2006 to 2009, he was Assistant Professor with the University of Modena and Reggio Emilia. In January 2010, he joined the University di Pavia where he is now Full Professor of electronics. He has authored over 150 technical papers. His main research interests cover device modeling and IC design for high-speed communications, RF and millimeter-wave systems. Dr. Mazzanti has been a member of the Technical Program Committee of the IEEE Custom Integrated Circuit Conference (CICC) from 2008 to 2014, IEEE European Solid State Circuits Conference (ESSCIRC) and IEEE International Solid State Circuits Conference (ISSCC) from 2014 to 2018. He has been Associate Editor for the Transactions on Circuits and Systems-I from 2012 to 2015 and Guest Editor for special issues of the Journal of Solid State Circuits dedicated to CICC 2013-14 and ESSCIRC-2015. Since 2017, he has been serving as an Associate Editor for the IEEE Solid-State Circuits Letters.
Presentation | Abstract |
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Breaking the Phase-Noise Barrier with Multi-Core and Series-Resonance Harmonic Oscillators in BiCMOS Technology | Read Abstract |

Sugako Otani is a system and processor architect at Renesas Electronics Corporation. Her current research focuses on application-specific architectures, ranging from IoT devices to automotive. She joined Mitsubishi Electric Corporation, Japan, in 1995 after receiving an M.S. in physics from Waseda University, Tokyo. She received a Ph.D. in Electrical Engineering and Computer Science from Kanazawa University in 2015. From 2005 to 2006, she was a Visiting Scholar at Stanford University. She is a committee member of ISSCC, VLSI Symposium, ESSCIRC, and Cool Chips. Since 2019, she has been a Visiting Associate Professor at Nagoya University, Japan.
Presentation | Abstract |
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Automotive System Design | Read Abstract |

Tim Piessens received the M.Sc. and Ph.D. degrees in electrical engineering from the Katholieke Universiteit Leuven, Leuven, Belgium, in 1998 and 2003, respectively. During his Ph.D., he focused on a new type of power amplifier/line driver for xDSL applications. In 2004, he co-founded ICsense, where he is the CTO and is responsible for the technical content of projects in the medical, automotive and consumer fields.
His current research interests include analog sensor readouts, non-linear system design, power management, high-voltage design and low-power, low-noise analog front-end design.
From 2014 till 2021, he was a member of the IEEE International Solid-State Circuits Conference Technical Program Committee. He was a member of the ISSCC EU leadership, the ISSCC executive committee and the ISSCC vision committee from 2019 till 2021 and ITPC EU chair in 2021. From 2020 on, he is a member of the ESSDERC-ESSCIRC Steering Committee.
Presentation | Abstract |
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Challenges in Battery Monitoring Systems for Electrical Vehicles | Read Abstract |
Design of Fully Integrated Charge Pumps | Read Abstract |
Design of High Performance Readout Chains for MEMS Barometric Pressure Sensors | Read Abstract |
High Performance, Low Power 3D Magnetic Hall Sensor design and challenges | Read Abstract |

Mingoo Seok is an associate professor of Electrical Engineering at Columbia University. He received his B.S. from Seoul National University, South Korea, in 2005, and his M.S. and Ph.D. degree from the University of Michigan in 2007 and 2011, respectively, all in electrical engineering. His research interests are various aspects of VLSI circuits and architecture, including ultra-low-power integrated systems, cognitive and machine-learning computing, an adaptive technique for the process, voltage, temperature variations, transistor wear-out, integrated power management circuits, event-driven controls, and hybrid continuous and discrete computing. He won the 2015 NSF CAREER award and the 2019 Qualcomm Faculty Award. He is the technical program committee member for multiple conferences, including IEEE International Solid-State Circuits Conference (ISSCC). In addition, He has been an IEEE SSCS Distinguished Lecturer for Feb/2023-Feb/2025 and an associate editor for IEEE Transactions on Circuits and Systems Part I (TCAS-I) (2014-2016), IEEE Transactions on VLSI Systems (TVLSI) (2015-present), IEEE Solid-State Circuits Letter (SSCL) (2017-2022), and as a guest associate editor for IEEE Journal of Solid-State Circuits (JSSC) (2019).
Presentation | Abstract |
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Review, Survey, and Benchmark of Recent Digital LDO Voltage Regulators | Read Abstract |
SRAM-based In-Memory Computing Hardware: Analog vs Digital and Macros to Microprocessors | Read Abstract |

Dr. Farhana Sheikh is a Principal Engineer at Intel’s Programmable Solutions Group. She has over 15 years of experience in ASIC and DSP/communications research including adaptive DSP, crypto, graphics, quantum wireless control, and 5G+ wireless. Since joining PSG, after 10+ years in Intel Labs, Farhana’s research focuses on 2D and 3D chiplet + FPGA integration research, with a focus on 3D heterogeneous integration for next generation wireless and sensing applications. Farhana has published over 50 papers and filed 22 patents, has initiated the AIB-3D open-source specification for 3D chiplet heterogeneous integration. Farhana was instrumental in enabling Intel 16 for Intel’s IDM2.0 and is the co-creator of Intel’s University Shuttle Program. Outside of Intel she volunteers for IEEE Solid-State Circuits Society (SSCS) and is the SSCS Women in Circuits Committee Chair. Farhana is a co-recipient of 2020, 2019, and 2012 IEEE ISSCC Outstanding Paper Awards. In 2021, Farhana was recognized for her mentorship work with students and faculty by the Semiconductor Research Corporation (SRC) that awarded her the 2021 Mahboob Khan Outstanding Industry Liaison Award. She is IEEE SSCS Member-at-Large for 2022-2024, and IEEE SSCS Distinguished Lecturer for 2023 and 2024.
Presentation | Abstract |
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FPGA-Chiplet Architectures and Circuits for 2.5D/3D 6G Intelligent Radios | Read Abstract |
Laying the Foundation for Intelligently Adaptive Radios | Read Abstract |

Presentation | Abstract |
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3D millimeter-wave imaging and sensing with Si-based phased arrays, edge computing, and AI | Read Abstract |
Packaging and module integration as a catalyst for innovation in Si-based millimeter-wave systems | Read Abstract |

Dr. Walling received the B.S. degree from the University of South Florida, Tampa, in 2000, and the M.S. and Ph. D. degrees from the University of Washington, Seattle, in 2005 and 2008, respectively. He was employed at Motorola, Plantation, FL working in cellular handset development. He interned for Intel from 2006-2007, working on highly-digital transmitters and CMOS PAs and continued this research while a Postdoctoral Researcher at the University of Washington. He was an associate professor in the ECE department at University of Utah, Head of RF Transceivers in the Microelectronic Circuits Centre Ireland at the Tyndall National Institute in Ireland, a Principal Engineer in Qualcomm CR&D, and a Senior Principal Engineer at Skyworks Solutions, Inc. He is presently an Associate Professor in the Bradley ECE Department at Virginia Tech. His research focuses on solutions for the next generation of wireless communication.
Dr. Walling has authored ~90 journal articles and conference papers and holds four patents with three pending. He gave a Keynote address at IEEE ESSCIRC on Digital Power Amplifiers in 2019, he received the Outstanding Teaching Award at University of Utah in 2015, the HKN Award for Excellence in Teaching in 2012, Best Paper Award at Mobicom 2012, the Yang Award for outstanding graduate research from the EE Department at University of Washington in 2008, an Intel Predoctoral Fellowship in 2007-2008, and the Analog Devices Outstanding Student Designer Award in 2006.
Presentation | Abstract |
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CMOS Power Amplifiers and Transmitters: The Evolution from 'Digital-Friendly' RF to 'Digital' RF | Not yet available. |
Digitally Friendly Transmitters for Next Generation Communications | Not yet available. |
Mixed-Mode Transceivers in CMOS | Not yet available. |

Zhengya Zhang received the B.A.Sc. degree from the University of Waterloo in Canada in 2003, and the M.S. and Ph.D. degrees from UC Berkeley in 2005 and 2009. He has been a faculty member at the University of Michigan, Ann Arbor since 2009. His research is in low-power and high-performance integrated circuits and systems for computing, communications, and signal processing. Dr. Zhang was a recipient of the NSF CAREER Award, the Intel Early Career Faculty Award, the Neil Van Eenam Memorial Award from the University of Michigan, and the David J. Sakrison Memorial Prize from UC Berkeley. He served on the program committees of the Symposia on VLSI Technology and Circuits and CICC, and the editorial board of the IEEE Transactions on VLSI Systems.
Presentation | Abstract |
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Machine Learning Hardware Design for Efficiency, Flexibility and Scalability | Read Abstract |
The Challenges and Opportunities in the Path Towards Chipletization | Read Abstract |