Distinguished Lecturer Roster

"Everyone has been impressed by the vibrant and informative presentations of these renowned distinguished lecturers and valued the unique opportunity of having intimate technical discussions and exchanging ideas with such internationally recognized experts."

- Shahriar Mirabbasi, Chapter Chair of Vancouver SSCS, CPMT, and CESOC Joint Chapter, May 2015.

Terms through 31 December 2021

Massimo Alioto portrait
Massimo Alioto
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Terms through 31 December 2021

Massimo Alioto (M’01–SM’07-F’16) received the MSc degree in Electronics Engineering and the Ph.D. degree in Electrical Engineering from the University of Catania (Italy) in 1997 and 2001. He is currently with the Department of Electrical and Computer Engineering, National University of Singapore where he leads the Green IC group and is the Director of the Integrated Circuits and Embedded Systems area. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan Ann Arbor (2011-2012), BWRC – University of California, Berkeley (2009-2011), and EPFL (Switzerland, 2007).

He has authored or co-authored more than 280 publications on journals and conference proceedings. He is author of four books, including Enabling the Internet of Things - from Circuits to Systems (Springer, 2017), and the latest on Adaptive Digital Circuits for Power-Performance Range beyond Wide Voltage Scaling (Springer, 2020). His primary research interests include self-powered wireless integrated systems, near-threshold circuits for green computing, widely energy-scalable integrated systems, data-driven integrated systems, hardware-level security, and emerging technologies, among the others.

He is the Editor in Chief of the IEEE Transactions on VLSI Systems (2019-2020), and was the Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2018). In 2009-2010 he was Distinguished Lecturer of the IEEE Circuits and Systems Society, for which he is/was also member of the Board of Governors (2015-2020), and Chair of the “VLSI Systems and Applications” Technical Committee (2010-2012). He served as Guest Editor of several IEEE journal special issues, and Associate Editor of a number of IEEE and ACM journals. He is/was Technical Program Chair and Track Chair in a number of IEEE conferences (e.g., ISCAS 2023, SOCC, ICECS), and is currently in the IEEE “Digital architectures and systems” ISSCC subcommittee, and the ASSCC TPC. Prof. Alioto is an IEEE Fellow.

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PresentationAbstract
Circuits and architectures for computation with ultra-wide power-performance adaptation - Well beyond voltage scaling Read Abstract
Energy-Quality Scalable Integrated Systems - Preserving Energy Downscaling at the End of Moore’s Law Read Abstract
From Less Batteries to Battery-Less: Enabling A Greener World through Ultra-Wide Adaptation down to pWs Read Abstract
Pervasive hardware security: embedding it everywhere, continuously and inexpensively Read Abstract
Andrea Bevilacqua portrait
Andrea Bevilacqua
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Terms through 31 December 2021

Andrea  Bevilacqua received the Laurea and Ph.D. degrees in electronics engineering from the University of Padova, Padova, Italy, in 2000, and 2004,  respectively. From 2005 to 2015, he was an Assistant Professor with the  Department of Information Engineering, University of Padova, where he is now an Associate Professor. His current research interests include the design of analog and RF/microwave integrated circuits and the analysis of wireless communication systems, radars, and dcdc converters. He is author or co-author of more than 90 technical papers, and he holds 5 patents.

Dr. Bevilacqua is a member of the ITPC of IEEE ISSCC. He served in the TPC of IEEE ESSCIRC from 2007 to 2019, and was TPC Co-Chair of  IEEE ESSCIRC 2014. He was a member of the TPC of IEEE ICUWB from 2008  to 2010. He was an Associate Editor of the IEEE Transactions of  Circuits and Systems II from 2011 to 2013 and was nominated Best Associate Editor for the IEEE Transactions of Circuits and Systems II for 2012 to 2013. He served as a Guest Editor for the special issue of the IEEE Journal of Solid-State Circuits dedicated to ESSCIRC 2017. 

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PresentationAbstract
High Resolution Radar Imaging for Breast Cancer Detection: Trends and Challenges Read Abstract
Integrated Transformers: from Principles to Applications Read Abstract
Low-Phase Noise Bipolar VCOs for Integrated 5G Front-Ends Read Abstract
Venumadhav (Venu) Bhagavatula portrait
Venumadhav (Venu) Bhagavatula
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Terms through 31 December 2021

Venumadhav Bhagavatula received the B.E. degree in electronics and communication from the University of Delhi, New Delhi, India, the M.Tech. degree in electronic design technology from the Indian Institute of Science, Bangalore, India, and the Ph.D. degree in electrical engineering from the University of Washington, Seattle, WA, USA, in 2005, 2007, and 2013. Since 2014 he has been with the Advanced Circuit Design group at Samsung Semiconductors Inc., San Jose, CA, USA. His research interests include RF/mm-wave and low-power mixed signal circuits. He currently serves as a technical program committee member for the ISSCC.

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PresentationAbstract
Evolution of cellular RFICs (2G to 5G) Read Abstract
Insights into transceiver design for 5G mm-wave equipped cell-phones Read Abstract
Jaehyouk Choi portrait
Jaehyouk Choi
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Terms through 31 December 2021

Jaehyouk Choi (S’06–M’11) was born in Seoul, South Korea. He received the B.S. degree (summa cum laude) in electrical engineering from Seoul National University, Seoul, South Korea, in 2003, and the M.S. and Ph.D. degrees in electrical and computer engineering from Georgia Institute of Technology, Atlanta, GA, USA, in 2008 and 2010, respectively.

From 2010 to 2011, he was with Qualcomm, Inc., San Diego, CA, USA, where he was involved in designing multi-standard cellular transceivers. In 2012, he joined the Ulsan National Institute of Science and Technology (UNIST), Ulsan, South Korea, and served as a faculty member. Since 2019, he has been an Associate Professor at the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea.

Dr. Choi has been a TPC member of the IEEE ISSCC since 2017 and the IEEE ESSCIRC since 2016. He was the country representative of Korea for the ISSCC Far-East region in 2018. He have authored and coauthored more than 60 journal and conference publications. His research interests include low-power and high-performance analog, mixed signal, and RF integrated circuits for emerging wireless/wired communication standards.

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PresentationAbstract
Low-jitter ring-oscillator-based digital PLLs Read Abstract
MmWave-band frequency synthesizers Read Abstract
Ring-oscillator-based injection-locked clock generators Read Abstract
Man-Kay (Matthew) Law portrait
Man-Kay (Matthew) Law
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Terms through 31 December 2021

Man-Kay Law received the B.Sc. degree in computer engineering and the Ph.D. degree in electronic and computer engineering from the Hong Kong University of Science and Technology (HKUST), Hong Kong, in 2006 and 2011, respectively.

In 2011, he joined HKUST as a Visiting Assistant Professor. He is currently an Associate Professor with the State Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China. He has authored and coauthored more than 90 technical publications, and holds six U.S./Chinese patents. His research interests are on the development of ultra-low-power CMOS sensing/readout circuits and energy harvesting (EH) techniques for wireless and biomedical applications.

Dr. Law is a TPC member of IEEE ISSCC. He is also the country representative of China for the ISSCC Far-East region in 2019.  He was a co-recipient of the ASQED Best Paper Award in 2013, the A-SSCC Distinguished Design Award in 2015, the ASPDAC Best Design Award in 2016, and the Macao Science and Technology Invention Award (Second Class) by Macau Government–FDCT in 2014 and 2018. He is also the advisor for student awards, including the SSCS Pre-doctoral Achievement Award and the ISSCC Silkroad Award.

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PresentationAbstract
Capacitive Piezoelectric Energy Harvesting Techniques Read Abstract
High Efficiency Reconfigurable Monolithic Switched-Capacitor DC-DC Converter Read Abstract
Ultra-low Power/Energy Efficient High Accuracy CMOS Temperature Sensors for passive RFID Applications Read Abstract
Qiang Li portrait
Qiang Li
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Terms through 31 December 2021

Qiang Li is a professor at the Institute of Integrated Circuits and Systems (IICS), University of Electronic Science and Technology of China (UESTC), Chengdu, China. He received the B.Eng. degree in Electrical Engineering from Huazhong University of Science and Technology (HUST), Wuhan, China, in 2001, and the Ph.D. degree from Nanyang Technological University (NTU), Singapore, in 2007.

He has been working on analog/RF and mixed-signal circuits in both academia and industry. In 2001-2002, he was an RTP analog design engineer at the Centre for Wireless Communications (now I2R, A-STAR), Singapore. In 2006-2008, he was a senior engineer and project leader at the Institute of Microelectronics, A-STAR, Singapore. In 2008-2009, he was a Technical Consultant at the OKI Techno Centre (Singapore) Pte. Ltd. In 2011-2014, he was an Associate Professor at the Aarhus University, Denmark. He was the Vice Dean of the School of Microelectronics and Solid-State Electronics, UESTC, during 2014-2018. He is the founding head of the Institute of Integrated Circuits and Systems of UESTC. His research interests include low-voltage and low-power analog/RF circuits, data converters, and mixed-mode circuits for biomedical and sensor interfaces.

Dr. Li was a recipient of the Young Changjiang Scholar award in 2015, UESTC Teaching Excellence award in 2011 and Service Excellence award in 2018. He serves on the Technical Program Committees of ESSCIRC and ASSCC, the Student Research Preview (SRP) committee of ISSCC, and was the TPC Chair of IEEE 2018 APCCAS. He was/is a Guest Editor of IEEE Transactions on Circuits and Systems I (TCAS-I) and an Associate Editor of IEEE Open Journal of Circuits and Systems. He is the founding chair of IEEE SSCS/CASS Chengdu Joint Chapter.

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PresentationAbstract
CMRR Enhancement Techniques for Instrumentation Amplifiers Read Abstract
Subsampling-Based On-Chip Power-Supply Noise Analyzers Read Abstract
Subthreshold and Near-Threshold Analog Design Techniques Read Abstract
VCO-Based SAR ADCs Exploiting Inherent Oscillation-Cycle Information Read Abstract
Dejan Markovic portrait
Dejan Markovic
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Terms through 31 December 2021

Dejan Marković is a Professor of Electrical and Computer Engineering at the University of California, Los Angeles (UCLA). He is also affiliated with UCLA Bioengineering Department, Neuroengineering field. He completed the Ph.D. degree in 2006 at the University of California, Berkeley, for which he was awarded 2007 David J. Sakrison Memorial Prize. His current research is focused on implantable neuromodulation systems, domain-specific compute architectures, and design methodologies. Dr. Marković co-founded Flex Logix Technologies, a semiconductor IP startup, in 2014, and helped build foundational technology of Ceribell, a medical device startup. He received an NSF CAREER Award in 2009. In 2010, he was a co-recipient of ISSCC Jack Raper Award for Outstanding Technology Directions. He also received 2014 ISSCC Lewis Winner Award for Outstanding Paper.

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PresentationAbstract
Closed-Loop Neuromodulation Read Abstract
Next-Generation Chip and System Solutions Read Abstract
Omeed Momeni portrait
Omeed Momeni
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Terms through 31 December 2021

Omeed Momeni (S’04-M’12-SM’18) received the B.Sc. degree from Isfahan University of Technology, Isfahan, Iran, the M.S. degree from University of Southern California, Los Angeles, CA, and the Ph.D. degree from Cornell University, Ithaca, NY, all in Electrical Engineering, in 2002, 2006, and 2011, respectively.

He joined the faculty of Electrical and Computer Engineering Department at University of California, Davis in 2011 and is currently an Associate Professor. He was a visiting professor in Electrical Engineering and Computer Science Department at University of California, Irvine from 2011 to 2012. From 2004 to 2006, he was with the National Aeronautics and Space Administration (NASA), Jet Propulsion Laboratory (JPL) as a RFIC designer. His research interests include mm-wave and terahertz integrated circuits and systems.

 

Prof. Momeni serves as a Distinguished Lecturer for Solid-State Circuits Society (SSCS) since 2020, and a Technical Program Committee member of International Microwave Symposium (IMS) since 2017 and Radio Frequency Integrated Circuits (RFIC) Symposium since 2018. He has also served as an Associate Editor of Transactions on Microwave Theory and Techniques (TMTT) in 2018-20, an organizing committee member of IEEE International Workshop on Design Automation for Analog and Mixed-Signal Circuits in 2013, and the chair of the IEEE Ithaca GOLD section in 2008-11. Prof. Momeni is the recipient of National Science Foundation CAREER award in 2015, the Professor of the Year 2014 by IEEE at UC Davis, the Best Ph.D. Thesis Award from the Cornell ECE Department in 2011, the Outstanding Graduate Award from Association of Professors and Scholars of Iranian Heritage (APSIH) in 2011, the Best Student Paper Award at the IEEE Workshop on Microwave Passive Circuits and Filters in 2010, the Cornell University Jacob’s fellowship in 2007 and the NASA-JPL fellowship in 2003.

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PresentationAbstract
Scalable Standing Wave Integrated Circuits for Power Generation, Radiation and Beam Steering at mm-Wave and Terahertz Spectrum Read Abstract
Transistor Limits for mm-Wave and Terahertz Signal Generation and Power Amplification Read Abstract
Wideband and Low Power Frequency Synthesis for mm-Wave and Terahertz Applications Read Abstract
Masato Motomura portrait
Masato Motomura
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Terms through 31 December 2021
Masato Motomura received B.S. and M.S.in 1985 and 1987, respectively, and Ph.D. of Electrical Engineering in 1996, all from Kyoto University. He joined NEC research laboratories in 1987, where he worked on various
hardware architectures including multi-thread parallel processors, memory-based processors, and reconfigurable systems. From 2001 to 2008 he led research and productization of DRP (dynamically reconfigurable
processor) that he invented. He was also a visiting researcher at MIT Laboratory for Computer Science from 1991 to 1992. He became a professor at Hokkaido University in 2011, and then a professor at Tokyo Institute
of Technology from 2019 where he is currently leading AI Computing Research Unit. He won the IEEE JSSC Best Paper Award in 1992, IPSJ Best Paper Award in 1999, IEICE Achievement Award in 2011, and SSCC Silkroad Award as the last author in 2018, respectively. He is a member of IEEE, IEICE, IPSJ, and EAJ.
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PresentationAbstract
AI Computing: The Promised Land for Computer Architecture Innovation? Read Abstract
Rikky Muller portrait
Rikky Muller
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Terms through 31 December 2021

Rikky Muller (M’04–SM’17) received the B.S. and M.S. degrees from MIT, Cambridge, MA, USA, and the Ph.D. degree from the University of California at Berkeley, Berkeley, CA, USA, all in electrical engineering and computer sciences (EECS).

She previously held positions as an IC Designer with Analog Devices, Wilmington, MA, USA, and as a McKenzie Fellow and a Lecturer of EE with the University of Melbourne, Melbourne, VIC, Australia. She was also the Co-Founder of Cortera Neurotechnologies, Inc., Berkeley, a medical device company founded in 2013 and acquired in 2019, where she held positions as CEO and CTO. She is currently the S. Shankar Sastry Assistant Professor in Emerging Technologies with the EECS Department, University of California at Berkeley. She is also the Co-Director of the Berkeley Wireless Research Center, a Core Member of the Center for Neural Engineering and Prostheses, University of California at Berkeley, and an Investigator with the Chan-Zuckerberg Biohub, San Francisco, CA, USA. Her expertise is in the research and commercialization of implantable medical devices and in developing integrated circuits (ICs) and systems for neurological applications.

Dr. Muller is a member of the technical program committee for IEEE ISSCC, and has previously served on the committees of IEEE CICC and BioCAS. She has also served as a Guest Editor for the IEEE Journal of Solid-State Circuits. She is a Senior Member of the IEEE, and a member of the Solid-State Circuits Society, the Circuits and Systems Society, the Society for Neuroscience, Women in Circuits and Women in Neural Engineering. She has received numerous fellowships and awards, including the National Academy of Engineering Gilbreth Lectureship, the Chan-Zuckerberg Biohub Investigatorship, the Keysight Early Career Professorship, the Hellman Fellowship, and the NSF CAREER Award. She was named one of MIT Technology Review’s top 35 global innovators under the age of 35 (TR35), and one of MedTech Boston’s top 40 healthcare innovators under 40.

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PresentationAbstract
Wireless, closed-loop brain-machine interfaces and neurotherapeutics Read Abstract
Makoto Nagata portrait
Makoto Nagata
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Terms through 31 December 2021

Makoto Nagata received the B.S. and M.S. degrees in physics from Gakushuin University, Tokyo, in 1991 and 1993, respectively, and a Ph.D. in electronics engineering from Hiroshima University, Hiroshima, in 2001. He was a research associate at Hiroshima University from 1994 to 2002, an associate professor at Kobe University from 2002 to 2009 and promoted to a full professor in 2009. He is currently a professor of the graduate school of science, technology and innovation, Kobe University, Kobe, Japan. He is a senior member of IEICE and IEEE.

His research interests include design techniques targeting high-performance mixed analog, RF and digital VLSI systems with particular emphasis on power/signal/substrate integrity and electromagnetic compatibility, testing and diagnosis, three-dimensional system integration, as well as their applications for hardware security and safety.

Dr. Nagata has been a member of a variety of technical program committees of international conferences such as the Symposium on VLSI Circuits (2002-2009), Custom Integrated Circuits Conference (2007-2009), Asian Solid-State Circuits Conference (2005-2009), International Solid-State Circuits Conference (2014-2017), European Solid-State Circuits Conference (2020-) and many others. He is chairing the Technology Directions subcommittee for International Solid-State Circuits Conference (2018-present). He is also serving as SSCS AdCom member (2020-). He is currently an associate editor for IEEE Transactions on VLSI Systems (2015-present). He was a technical program chair (2010-2011), a symposium chair (2012-2013) and an executive committee member (2014-2015) for the Symposium on VLSI circuits, and also a chair for IEEE SSCS Kansai Chapter (2017-2018).

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PresentationAbstract
Deployment of EMC-Compliant IC Chip Techniques in Design for Hardware Security Read Abstract
IC Chip and Packaging Interactions in Design for SI, PI, EMC and ESD Read Abstract
On-Chip Physical Attack Protection Circuits for Hardware Security Read Abstract
RF Noise Coupling -- Understanding, Mitigation and Impacts on Wireless Communication Performance Read Abstract
Kazuko Nishimura portrait
Kazuko Nishimura
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Terms through 31 December 2021
Kazuko Nishimura received her B.E. degree in mechanical engineering from Osaka University, Japan, in 1995. She has since been engaged in the research and development of high-speed ADCs, optical transceivers and image sensors. Currently she is the manager in the Technology Innovation Division (Corporate R&D Division), Panasonic Corporation. Her technical focus  is in the advanced CMOS image sensor circuit and system development.
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PresentationAbstract
An Organic-Photoconductive-Film CMOS Image Sensor’s Advanced Technologies Read Abstract
Bernhard Wicht portrait
Bernhard Wicht
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Terms through 31 December 2021

Bernhard Wicht has 20+ years of experience in analog and power management IC design. He received the Dipl.‑Ing. degree in electrical engineering from University of Technology Dresden, Germany, in 1996 and the Ph.D. degree (Summa Cum Laude) from University of Technology Munich, Germany, in 2002. Between 2003 and 2010, he was with Texas Instruments, Freising, responsible for the design of automotive power management ICs. In 2010, he became a full professor for integrated circuit design and a member of the Robert Bosch Center for Power Electronics at Reutlingen University, Germany. Since 2017, he has been heading the Chair for Mixed-Signal IC Design at Leibniz University Hannover, Germany. His research interest includes IC design with focus on power management, gate drivers and high-voltage ICs. Dr. Wicht was co-recipient of the 2015 ESSCIRC Best Paper Award and of the 2019 First Prize Paper Award of the IEEE Journal of Emerging and Selected Topics in Power Electronics. In 2018, he received the faculty award for excellent teaching at his university. He invented seventeen patents with several more pending. He currently serves as a member of the Technical Program Committees of ESSCIRC and ISSCC.

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PresentationAbstract
Analog Building Blocks of DC-DC Converters Read Abstract
Faster, Higher, Monolithic – Efficient Energy Conversion with GaN Read Abstract
Powering Systems-on-Chip for Automotive and Information / Communications Technology Read Abstract
Tiny and Efficient – Power Management as a Key Function in Microelectronic Systems Read Abstract

Terms through 31 December 2022

Mike Shuo-Wei  Chen portrait
Mike Shuo-Wei Chen
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Terms through 31 December 2022

Mike Shuo-Wei Chen is a professor in Electrical Engineering Department at University of Southern California (USC) and holds the Colleen and Roberto Padovani Early Career Chair position. He received the B.S. degree from National Taiwan University, Taipei, Taiwan, in 1998 and the M.S. and Ph.D. degrees from University of California, Berkeley, in 2002 and 2006, all in electrical engineering.

As a graduate student, he proposed and demonstrated the asynchronous SAR ADC architecture, which has been adopted in industry today for low-power high-speed analog-to-digital conversion products. After joining USC in 2011, he leads an analog mixed-signal circuit group, focusing on high-speed low-power data converters, frequency synthesizers, RF/mm-wave transceiver designs, analog circuit design automation, bio-inspired computing, non-uniformly sampled circuits and systems. From 2006 to 2010, he worked on mixed-signal and RF circuits for various wireless communication products at Atheros Communications (now Qualcomm).

Dr. Chen was the recipient of Qualcomm Faculty Award in 2019, NSF Faculty Early Career Development (CAREER) Award, DARPA Young Faculty Award (YFA) both in 2014, Analog Devices Outstanding Student Award for recognition in IC design in 2006 and UC Regents’ Fellowship at Berkeley in 2000.  He also achieved an honorable mention in the Asian Pacific Mathematics Olympiad, 1994. Dr. Chen has been serving as an associate editor of the IEEE Solid-State Circuits Letters (SSC-L), IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), as well as a TPC member in IEEE Solid-State Circuits Society conferences, notably the IEEE International Solid-State Circuits Conference (ISSCC), IEEE Symposium on VLSI Circuits (VLSIC), and IEEE Custom Integrated Circuits Conference (CICC).

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PresentationAbstract
Asynchronous SAR ADC: Past, Present and Beyond Read Abstract
High-Performance Digital-to-Analog Converter Design: A Path towards Digital Transmitter Read Abstract
New Opportunities in Non-Uniform Sampling Read Abstract
Trend in Digital PLL Design and New Opportunities in Spur Cancellation Read Abstract
Qinwen Fan portrait
Qinwen Fan
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Terms through 31 December 2022

Qinwen Fan received her PhD degree from Delft University of Technology in 2013. From October 2012 to May 2015, she worked at Maxim Integrated in Delft, The Netherlands. From June 2015 to January 2017, she worked at Mellanox (currently known as Nvidia) in Delft, the Netherlands. Since 2017, she rejoined the Delft University of Technology and is currently an Assistant professor in the electronics and instrumentation laboratory.

Her current research interests include precision analog, current sensing, class D audio amplifiers, DC-DC converters and autonomous wireless sensor nodes.

Dr. Fan serves as an associate editor of Open Journal of the Solid-State Circuits Society (OJ-SSCS), a TPC member of International Solid-State Circuits Conference (ISSCC), and a TPC member of European Solid-state circuits conference (ESSCIRC).

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PresentationAbstract
High switching frequency class D audio amplifiers Read Abstract
Precision Amplifiers: a road towards perfection Read Abstract
Brian Ginsburg portrait
Brian Ginsburg
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Terms through 31 December 2022
Brian Ginsburg received his S.B., M.Eng., and Ph.D. degrees from the Massachusetts Institute of Technology.   He joined Texas Instruments, Dallas, Texas in 2007 working in its wireless terminals business unit and TI’s Kilby Labs.  Now, he is a Distinguished Member of Technical Staff and the systems manager of TI’s radar business.  He has served on the technical program committee for the International Solid-State Circuits Symposium and is the Symposium Co-Chair of the 2021 Symposium on VLSI Circuits.
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PresentationAbstract
Digitally Enhanced mm-Wave Radars Read Abstract
mm-Wave Imaging for Automotive and Beyond Read Abstract
Danielle Griffith portrait
Danielle Griffith
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Terms through 31 December 2022

Danielle Griffith received the B.S.E.E. and M.Eng. degrees from the Massachusetts Institute of Technology, Cambridge in 1996 and 1997, respectively. She joined Motorola in Tempe, AZ in 1997 and worked in the area of RF circuit design.  In 2003, she joined Texas Instruments in Dallas, Texas and is a Fellow in the Connectivity business unit.  She develops circuits and techniques for reducing cost, power consumption, and circuit board area for low power wireless connectivity products.  Her current focus areas are architectures for efficient wireless systems, low power oscillators and MEMS circuitry.  She has published >50 papers, most of them in IEEE journals or conferences.   She has written a book chapter titled “Synchronization Clocks for Ultra-Low Power Wireless Networks” which was published by Springer as a part of the book “Ultra-Low-Power Short-Range Radios”.  Danielle holds 19 issued US patents and has given multiple university and IEEE conference tutorial and workshop sessions.  She was a member of the Technical Program Committees for the IEEE RFIC Symposium for conferences years 2014 and 2015, the IEEE International Solid-State Circuits Conference for conference years 2015-2019, and the VLSI Symposium starting in 2019. 

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PresentationAbstract
Frequency Generation for the Internet of Things Read Abstract
Precision BAW oscillators for low power, high performance applications Read Abstract
Radio Architectures and Circuits for Low Power Wide Area Networks Read Abstract
Towards Zero: Power Consumption Trends in Low Data Rate Wireless Connectivity Products Read Abstract
Jaydeep Kulkarni portrait
Jaydeep Kulkarni
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Terms through 31 December 2022

(S’03–M’09–SM’15) Jaydeep Kulkarni received B.E. degree from University of Pune, India in 2002, M. Tech degree from Indian Institute of Science (IISc) in 2004 and Ph.D. degree from Purdue University in 2009. During 2009-2017, he worked as a Research Scientist at Intel Circuit Research Lab in Hillsboro, OR. Currently, he is an assistant professor in the department of electrical and computer engineering at the University of Texas at Austin and a fellow of Silicon Labs Chair in electrical engineering and a fellow of AMD chair in computer engineering. 

Dr. Kulkarni has filed 36 patents, published 2 book chapters, and 85 papers in refereed journals and conferences. His research is focused on machine learning hardware accelerators, in-memory computing, DTCO for emerging nano-devices, heterogeneous and 3D integrated circuits, hardware security, and cryogenic computing. He received 2004 best M. Tech student award from IISc Bangalore, 2008 Intel Foundation Ph.D. fellowship award, 2010 Purdue school of ECE outstanding doctoral dissertation award, 2015 IEEE Transactions on VLSI systems best paper award, 2015 SRC outstanding industrial liaison award, 2018, 2019 Micron Foundation Faculty Awards, and 2020 Intel Rising Star Faculty Award. He has participated in technical program committees of CICC, A-SSCC, DAC, ICCAD, ISLPED, and AICAS conferences. He currently serves as an associate editor for IEEE Solid State Circuit Letters and IEEE Transactions on VLSI Systems. He is also serving as a distinguished lecturer for the IEEE Solid State Circuit Society and as the chair of IEEE Solid State Circuits Society and Circuits and Systems Society central Texas joint chapter. He is a senior member of IEEE and National Academy of Inventors.

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PresentationAbstract
Compute-in-Memory Designs: Trends and Prospects Read Abstract
High performance embedded memory design in advanced FinFET technologies Read Abstract
Noriyuki  Miura portrait
Noriyuki Miura
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Terms through 31 December 2022

Noriyuki Miura received the B.S., M.S., and Ph.D. degrees in electrical engineering all from Keio University, Yokohama, Japan, in 2003, 2005, and 2007 respectively. From 2005 to 2008, he was a JSPS Research Fellow and since 2007 an Assistant Professor with Keio University, where he developed wireless interconnect technology for 3D integration. In 2012, he moved to Kobe University, Kobe, Japan, and became a Professor at Osaka University, Suita, Japan in 2020. Also, he was concurrently appointed as a JST PRESTO researcher, and now working on hardware security/safety and next-generation heterogeneous computing systems. Dr. Miura is currently serving as a Technical Program Committee (TPC) Member for A-SSCC and Symposium on VLSI Circuits. He served as the TPC Vice Chair of 2015 A-SSCC. He was a recipient of the Top ISSCC Paper Contributors 2004-2013, the IACR CHES Best Paper Award in 2014.

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PresentationAbstract
Integrated Security Interface Against Cyber-Physical Attacks Read Abstract
Smart Metal Passives Read Abstract
Alyosha Christopher Molnar portrait
Alyosha Christopher Molnar
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Terms through 31 December 2022

Alyosha Molnar received his B.S. in engineering from Swarthmore College in 1997, and M.S. (2003) and Ph.D. (2007) in electrical engineering from the University of California, Berkeley. From 1998 to 2002, he was with the RFIC Group at Conexant Systems, Inc., Newport Beach, CA, where he co-led the development of their first-generation GSM direct conversion receiver. In graduate school he worked on one of the first sub-milliwatt radios for “smart dust”, before spending several years in a neuroscience lab studying the biological circuits that underlie early image processing in the mammalian retina.  In 2007, he became a faculty member with the School of Electrical and Computer Engineering at Cornell University.  His research interests span RF and mm-wave integrated circuits for flexible wireless systems, novel image sensors and associated image processing, neuroscience and neural interface systems and circuits, and microscale autonomous systems.  He is a recipient of many teaching and research awards including the NSF CAREER award, DARPA Young Faculty Award, and the ISSCC Lewis Winner award.

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PresentationAbstract
Analog at the Extremes: Wireless Signals from Watts to Nanowatts Read Abstract
Flexible Radio Front-Ends For A Crowded, Dynamic Spectrum Read Abstract
Integrated Optoelectronic Sensors For Biology Read Abstract
N-path Passive Mixers: Simple Circuits, Surprising Capabilities Read Abstract
Arijit Raychowdhury portrait
Arijit Raychowdhury
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Terms through 31 December 2022

Arijit Raychowdhury is the Motorola Foundation Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. From 2013 to July 2019, he was an Associate Professor and held the ON Semiconductor Junior Professorship with the department. His industry experience includes five years as a Staff Scientist with the Circuits Research Lab, Intel Corporation, and two years as an Analog Circuit Researcher with Texas Instruments Inc. Dr. Raychowdhury’s research interests include low-power digital and mixed-signal circuit design and exploring interactions of circuits with device technologies. Dr. Raychowdhury has authored over 200 articles in journals and refereed conferences and holds more than 26 U.S. and international patents. Dr. Raychowdhury and his group have also received numerous awards and fellowships. Dr. Raychowdhury was the recipient of the Qualcomm Faculty Award in 2020, the IEEE/ACM Innovator under 40 Award in 2018, the NSF CISE Research Initiation Initiative Award (CRII), in 2015, Intel Faculty Award in 2015, the Intel Labs Technical Contribution Award, in 2011, the Dimitris N. Chorafas Award for outstanding doctoral research, in 2007. His students have also won several prestigious fellowships and 13 best paper awards over the years. He is a Senior Member of IEEE and currently serves on the technical program committees of several IEEE Conferences.

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PresentationAbstract
All-Digital and Digital-Assisted Integrated Low-Dropout Regulators (LDOs) for Fine-Grained Spatiotemporal Power Management of Digital Load Circuits Read Abstract
Bits and Brains: Ultra-low Power, Neuro-inspired Edge-AI for Autonomous Systems Read Abstract
Seung-Tak Ryu portrait
Seung-Tak Ryu
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Terms through 31 December 2022
Seung-Tak Ryu is a professor in school of electrical engineering at KAIST. He Received the B.S. degree in electrical engineering from Kyungpook National University, Korea, in 1997, and the M.S. and Ph.D. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 1999 and 2004, respectively. From 2001 to 2002, he was with the University of California, San Diego, CA, USA, as a Visiting Researcher. Before joining KAIST as a faculty member, he was with Samsung Electronics, Yongin, Korea, where he was involved in mixed-signal IP design. He served on the technical program committees (TPC) of the ISSCC and served as a guest editor of the IEEE journal of solid-state circuits. He currently serves as a member of TPCs of ASSCC, CICC, and ESSCIRC. He also serves as an associate editor of the IEEE solid-state circuits letters.
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PresentationAbstract
Architectural Evolution of Power-efficient ADCs Assisted by SAR ADCs Read Abstract
Bringing Back Pipelined ADCs in the Era of SAR ADCs Read Abstract
Visvesh S. Sathe  portrait
Visvesh S. Sathe
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Terms through 31 December 2022
Visvesh S. Sathe received the B.Tech. degree from the Indian Institute of Technology, Bombay and the M.S. and Ph.D. degrees from the University of Michigan, Ann Arbor. He is currently an Associate Professor of Electrical and Computer Engineering at the University of Washington where he leads the Processing Systems Lab (PSyLab), focused on research associated with energy-efficient computing and implantable electronics. Prior to joining the University of Washington, he served as a Member of Technical Staff in the Low-Power Advanced Development Group at AMD, where his research focused on inventing and implementing circuit, clocking and supply mitigation technologies in next-generation microprocessors. These technologies include high-speed digital circuits, adaptive clocking for supply noise mitigation and resonant clocking. His current research interests include implementation of run-time hardware control and optimization in digital and mixed-signal systems over a range of applications. He is the recipient of an NSF Career award in 2019 and more recently, the Intel outstanding researcher award in 2021. He serves on the technical program committee of the IEEE Custom Integrated Circuits Conference
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PresentationAbstract
Exploiting Run-time Computing to Build Better Circuits...for Computing Read Abstract
Solving the SoC Supply Noise Problem through Adaptive Clocking: Past, Present, and Future Read Abstract
Sudip Shekhar portrait
Sudip Shekhar
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Terms through 31 December 2022

Sudip Shekhar received his B.Tech. degree from the Indian Institute of Technology, Kharagpur, and the Ph.D. degree from the University of Washington, Seattle.

From 2008 to 2013, he was with the Circuits Research Laboratory, Intel Corporation, Hillsboro, OR, USA, where he worked on high-speed I/O architectures. He is now an Associate Professor of Electrical and Computer Engineering with The University of British Columbia, Vancouver. His current research interests include circuits for electrical and optical interfaces, frequency synthesizers, and wireless transceivers.

Dr. Shekhar was a recipient of the Young Alumni Achiever Award by IIT Kharagpur in 2019, the IEEE Transactions on Circuit and Systems Darlington Best Paper Award in 2010 and a co-recipient of IEEE Radio-Frequency IC Symposium Student Paper Award in 2015. He serves on the technical program committee of IEEE International Solid-State Circuits Conference (ISSCC), Custom Integrated Circuits Conference (CICC) and Optical Interconnects (OI) Conference.

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PresentationAbstract
Coherent Silicon Photonic Links Read Abstract
Frequency Synthesis Type One Read Abstract
In-Band Full-Duplex Radios: Present and Future Read Abstract
Silicon: The playground for photons and electrons Read Abstract
Nan Sun portrait
Nan Sun
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Terms through 31 December 2022

Nan Sun is Professor with Tsinghua University. He was Assistant and then tenured Associate Professor with the University of Texas at Austin. He received B.S. degree from Tsinghua University in 2006, and Ph.D. degree from Harvard University in 2010. Dr. Sun received the NSF Career Award in 2013, and the inaugural IEEE SSCS New Frontier Award in 2020. He has published over 160 papers at premier journal and conferences, including 29 JSSC papers and 47 ISSCC/VLSI/CICC papers. He serves on the Technical Program Committee of CICC and ASSCC. He served as an Associate Editor of TCAS-I, and a Guest Editor of JSSC. He also serves as Distinguished Lecturer for both IEEE Circuits-and-Systems Society and IEEE Solid-State Circuits Society.

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PresentationAbstract
Break the kT/C Noise Limit Read Abstract
Compressive Sensing Techniques for Low-Power Sensor Design Read Abstract
The Floating Inverter Amplifier Read Abstract
When SAR meets Delta Sigma Read Abstract
Filip Tavernier portrait
Filip Tavernier
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Terms through 31 December 2022
Filip Tavernier obtained the M.Sc. degree in Electrical Engineering and the Ph.D. degree in Engineering Science from KU Leuven, Leuven, Belgium, in 2005 and 2011, respectively. During 2011-2014, he was Senior Fellow in the microelectronics group at the European Organization for Nuclear Research (CERN) in Geneva, Switzerland. He was involved in chip designs for the upgrade program of the Large Hadron Collider (LHC) experiments. In 2014, he rejoined KU Leuven at the Department of Electrical Engineering (ESAT-MICAS). As of October 2015, he has been a 
professor within the same department. His main research interests include circuits for optical communication, data converters, DC-DC converters, and chips for cryogenic environments. 
Filip is a member of the technical program committees of ESSCIRC, CICC, and SBCCI. He has been SSC-L Guest Editor and is the current SSCS Webinar Chair.
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PresentationAbstract
Exploring the Speed – Accuracy – Power Limits of Nyquist ADC Architectures Read Abstract
The Step Size – Input Range – Efficiency Trade-Off in SC DC-DC Converters Read Abstract
Using CMOS for Optical Communication Read Abstract