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Chapter Representatives at the 2015 SSCS Chapter Chair Luncheon during ISSCC in February
Chapter Representatives at the 2015 SSCS Chapter Chair Luncheon during ISSCC in February
IEEE "Rapid Post" makes new JSSC articles available in advance of the full electronic and print issues. Rapid posted articles are peer-reviewed and edited, but not paginated.
SSCS DL Program Fall 2014
DL Roster through 2015:Wim Dehaene, Payam Heydari, Eric Klumperink, John Long, Borivoje Nikolic, Ullrich Pfeiffer, Jan Rabaey, Sang-Pan U (Ben), Francesco Svelto, Jan Van der Spiegel.

Featured News

ISSCC 2016 Silicon Systems for the Internet of Everything - Call for Papers

ISSCC organizers are seeing submissions for the 2016 conference to be held January 31 - February 4, 2016 in San Francisco, California, USA.

The ISSCC 2016 conference theme is "Silicon Systems for the Internet of Everything".

Deadline for Electronic Submission of Papers: Monday, September 14, 2015, 3:00 PM Eastern Daylight Time (19:00 GMT)

More information and submission instructions can be found at


ESSCIRC 2015 - 41st European Solid-State Circuits Conference


From September 14 to 18, 2015 the European Solid-State Circuits Conference (ESSCIRC) is providing an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. While keeping separate Technical Program Committees, ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong. For further information please use the following link . For registration please use the button: “Registration” or send an e-mail to The conference program can be downloaded at from: .



New Staff Announcement

Abira Sengupta

Abira Sengupta is the new Administrator for the Solid-State Circuits Society and will be the primary contact for all chapters’ related matters and the Solid-State Circuits Magazine.

As a member of the Society staff team, Abira’s duties will be primarily focused in the areas of member communications, project management, and support services. Abira will be your primary staff contact for the Distinguished Lecturers series, Webinar program support, social media, and the Circuits Magazine editorial support and news reporting’s.

By way of background, Abira graduated from Rutgers University where she studied Journalism and Media Studies. Her prior position before coming to IEEE was as an Assistant Editor at Springer Science + Business Media.  Some of the technical journals and publications Abira supported were in the disciplines of Chemistry, Materials Science, and Engineering.   Additionally, she worked closely with two large societies: The Minerals, Metals & Materials Society and ASM International.  Abira’s duties included performing copy-editing, assisting in production planning, and working closely with authors and editors to create marketing content for her assigned portfolio of books and journals.

Abira is looking forward to hearing about the latest chapter developments and happenings and featuring your chapter news in the Circuits magazine.

Please contact Abira via email – or telephone – 732-562-2676.


IEEE Radio Frequency Integrated Circuits Symposium

2016rficAs General Chair, I invite you to participate in the 2016 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, to be held in San Francisco, California, USA, during May 22-24, 2016. RFIC is the premier IC conference focused exclusively on the latest developments in RF, Microwave, and Millimeter Wave Integrated Circuit technology and innovation. RFIC, the International Microwave Symposium (IMS), ARFTG, and the IMS Industry Exhibition make up the “Microwave Week”, the largest worldwide RF/microwave meeting of the year. Come to Microwave week to learn from the world’s experts through a wide variety of technical sessions, interactive forums, panel sessions, workshops, short courses, industry showcase, industrial exhibits, application seminars, and historical exhibits. 

Call for Papers... 

2015 IEEE Dallas Circuits and Systems Conference

dcasThe 2015 IEEE Dallas Circuits and Systems Conference will be held at the Lyle School of Engineering on the Southern Methodist University campus, on October 12-13, 2015. It will feature a comprehensive showcase of technical papers, poster sessions, plenary talks by experts, and an industrial forum program featuring panel discussions and vendor exhibits. 2015 marks the 11th Dallas Circuits and Systems conference, and the first to be jointly sponsored by the IEEE Circuits and Systems and IEEE Solid-State Circuits Societies; and to mark the advancements seen in the field, the conference theme is “Enabling Technologies for a Connected World”.

Conference Website
Paper Submission

Webinar by Jake Baker - "Low-Power, High-Bandwidth, and Ultra-Small Memory Module Design"



 Bio: Jake Baker (S’83-M’88-SM’97-F'13) was born in Ogden, Utah, on October 5, 1964. He received the B.S. and M.S. degrees in electrical engineering from the University of Nevada, Las Vegas, in 1986 and 1988. He received the Ph.D. degree in electrical engineering from the University of Nevada, Reno in 1993. His Google scholar profile is located here.

Abstract: The main memory subsystem has become inefficient. Sustaining performance gains has power consumption, capacity, and cost moving in the wrong direction. This talk proposes novel module, DRAM, and interconnect architectures in an attempt to alleviate these trends. The proposed architectures utilize inexpensive innovations, including interconnect and packaging, to substantially reduce the power, and increase the capacity and bandwidth of the main memory system. A low cost advanced packaging technology is used to propose an 8 die and 3 32-die memory module. The 32-die memory module measures less than 2 cm . The size and packaging technique allow the memory module to consume less power than conventional module designs. A 4 Gb DRAM architecture utilizing 64 data pins is proposed. The DRAM architecture is inline with ITRS roadmaps and can consume 50% less power while increasing bandwidth by 100%. The large number of data pins are supportedb l y aow power capaci it vecoupled interconnect. The receivers developed for the capacitive interface were fabricated in 0.5 µm and 65 nm CMOS technologies. The 0.5 µm design operated at 200 Mbps, used a coupling capacitor of 100 fF, and consumed less than 3 pJ/bit of energy. The 65 nm design operated 4 atGbps, used li i f 1 d a coupling capacitor of 15 fF, and dl h 1 d consumed less than 15 fJ/bit.

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Upcoming SSCS Conferences

2015 IEEE Custom Integrated Circuits Conference - CICC 2015
San Jose, CA USA Sep 28, 2015 - Sep 30, 2015
2015 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Xiamen City, Fujian Province, China Nov 9, 2015 - Nov 11, 2015
2016 IEEE International Solid- State Circuits Conference - (ISSCC)
San Francisco, CA USA Jan 31, 2016 - Feb 4, 2016
2016 IEEE Symposium on VLSI Circuits
Honolulu, HI USA Jun 15, 2016 - Jun 17, 2016
2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Toyama, Japan Nov 7, 2016 - Nov 9, 2016
2017 IEEE International Solid- State Circuits Conference - (ISSCC)
San Francisco, CA USA Feb 5, 2017 - Feb 9, 2017

Current SSCS Publications

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