transmitter (TX)

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A 7-Level 18-Wire-State Trio-Signaling Transmitter for MIPI C-PHY 3.0 Interfaces

A 7-Level 18-Wire-State Trio-Signaling Transmitter for MIPI C-PHY 3.0 Interfaces 150 150
Author(s): Junyeong Lee, Myeongjin Oh, Kiwoon Kim, Jung-Hoon Chun

Abstract:

This letter presents a MIPI C-PHY v3.0 TX, which adopts trio-signaling using three wires per lane. Each line supports seven-level signaling, enabling 18 wire states to map 32-bit data into nine symbols, achieving 3.56 bits/symbol efficiency. Balanced coding maintains constant driver current, enhancing SSO noise immunity, and embedded clocking is achieved …

Published in: IEEE Solid-State Circuits Letters
Page(s): 101 – 104
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3672642
Publisher: IEEE

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An Optimal Modulation Bits-to-RF Digital Transmitter Using Time-Interleaved Multi-Subharmonic Switching

An Optimal Modulation Bits-to-RF Digital Transmitter Using Time-Interleaved Multi-Subharmonic Switching 150 150
Author(s): Timur Zirtiloglu, Arman Tan, Basak Ozaydin, Ken R. Duffy, Muriel Médard, Rabia Tugce Yazicigil

Abstract:

This article presents a fully integrated bits-to-RF transmitter (Tx) featuring deep power back-off (PBO) enhancements, leveraging a multi-subharmonic switching (multi-SHS) digital power amplifier (DPA) with time-interleaving and a harmonic-rejection digital-to-phase converter (DPC). This work employs a nonuniform optimal modulation (OM) constellation, where symbol probability is inversely related to its amplitude, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3659903
Publisher: IEEE

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Two 7–13-GHz GaAs-SiGe Four–Channel Beamforming Chiplets With/Without Metallic Interlayer Shields

Two 7–13-GHz GaAs-SiGe Four–Channel Beamforming Chiplets With/Without Metallic Interlayer Shields 150 150
Author(s): Nengxu Zhu, Yiting Zhang, Genyin Ma, Fanyi Meng

Abstract:

This letter presents two 7–13-GHz GaAs-SiGe four-channel beamforming chiplets to minimize the chip area. The chips integrate GaAs-based power amplifiers (PAs) and low-noise amplifiers (LNAs) with silicon-based phase and amplitude control modules using gold bumps. To mitigate coupling between the metal patterns of the heterogeneous chips and avoid interference with …

Published in: IEEE Solid-State Circuits Letters
Page(s): 161 – 164
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3573757
Publisher: IEEE

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