Regulation

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A Capacitor-Free Hybrid-Process Low Dropout Regulator With Ultrahigh-Gain Amplifier and Super Source Follower for 0.297 mV/A Load Regulation and 0.024 mV/V Line Regulation

A Capacitor-Free Hybrid-Process Low Dropout Regulator With Ultrahigh-Gain Amplifier and Super Source Follower for 0.297 mV/A Load Regulation and 0.024 mV/V Line Regulation 150 150
Author(s): Yu-Ting Huang, Xiao-Quan Wu, Chi-Yu Chen, Po-Jui Chiu, Chien-Wei Cho, Tz-Wun Wang, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Sheng-Hsi Hung, Chih-Fang Huang, Philex Ming-Yan Fan, Tsorng-Juu Liang, Hann-Huei Tsai

Abstract:

The proposed capacitor-free hybrid-process low-dropout regulator (LDO) achieves 900-mA maximum current capacity and 99.99% peak current efficiency with 90 $\mu $ A quiescent current. By combining GaN and silicon processes, the proposed Ultrahigh gain amplifier (UHGA) enables a high loop gain to achieve 0.297-mV/A load regulation and 0.024-mV/V line regulation. Furthermore, …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3702962
Publisher: IEEE

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A 6.9-ppm/°C, 0.66-mV/V Line Regulation, 50-mA Multi-Loop Low-Dropout Regulator With Integrated Single-BJT Voltage and Current References

A 6.9-ppm/°C, 0.66-mV/V Line Regulation, 50-mA Multi-Loop Low-Dropout Regulator With Integrated Single-BJT Voltage and Current References 150 150
Author(s): Raghav Bansal, Shouri Chatterjee

Abstract:

This article presents a fully integrated output-capacitor-less (OCL) multi-feedback-loop low-dropout regulator (LDO) with an in-built single bipolar junction transistor (BJT)-based voltage and current reference (VCR) for energy-harvesting Internet of Things (IoT) devices. The proposed architecture comprises four loops, which significantly enhance the DC regulation and transient performance of the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3694415
Publisher: IEEE

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A Low-Voltage-CMOS AC–DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT

A Low-Voltage-CMOS AC–DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT 150 150
Author(s): Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang, Rui P. Martins, Pui-In Mak

Abstract:

This article presents a power- and area-efficient switched-capacitor (SC) ac–dc converter in low-voltage (LV) CMOS for mains-powered Internet of Things (IoT) applications. The proposed converter adopts a single-stage series-capacitor architecture with fine-grained pre-rectification regulation, eliminating the need for intermediate high-voltage (HV) dc capacitors or HV dc–dc stages, thereby …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3650592
Publisher: IEEE

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A 16 V-Output Switched-Capacitor Sigma Converter With 180 ns Transient Response and 94% Efficiency for LiDAR Receivers

A 16 V-Output Switched-Capacitor Sigma Converter With 180 ns Transient Response and 94% Efficiency for LiDAR Receivers 150 150
Author(s): Chen Hu, Xinran Huang, Xun Liu, Sijun Du, Xiaosen Liu, Junmin Jiang

Abstract:

This article presents a step-up switched-capacitor (SC) sigma converter with fast transient, high efficiency, and high accuracy for light detection and ranging (LiDAR) receiver applications. The proposed sigma converter combines an unregulated SC converter in the high-voltage (HV) domain and a low-dropout (LDO) regulator in the low-voltage (LV) domain, achieving …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3645413
Publisher: IEEE

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A Fast Transient Response Fully Integrated LDO With a Novel Resetting Oscillator Control Method

A Fast Transient Response Fully Integrated LDO With a Novel Resetting Oscillator Control Method 150 150
Author(s): Masoud Kargaran, Amir Besharati Rad, Ali Medi

Abstract:

This article introduces a novel resetting oscillator regulator (ROR) control method for low-dropout (LDO) regulators, designed to achieve fast settling times for both load and reference input steps. The proposed ROR integrates a high-speed loop that independently functions as an oscillator in a closed-loop configuration, along with a separate high-rate …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3607941
Publisher: IEEE

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A Unified Early-Warning AVFS Design With Path Activation-Aware Monitoring Point Optimization

A Unified Early-Warning AVFS Design With Path Activation-Aware Monitoring Point Optimization 150 150
Author(s): Cai Li, Kaize Zhou, Junyi Qian, Haochang Zhi, Weiwei Shan

Abstract:

This work proposes a unified early-warning adaptive voltage-frequency scaling (AVFS) system that offers a practical low-power solution for commercial IoT devices. First, a path activation-aware monitoring point optimization strategy is proposed to mitigate the risk of illegal voltage scaling. The strategy combines the path activation evaluation with the required timing …

Published in: IEEE Solid-State Circuits Letters
Page(s): 229 – 232
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3593960
Publisher: IEEE

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Digital Low-Dropout Regulator-Assisted Buck DC-DC Converter Achieving 68-mV Droop Voltage and 95.5% Efficiency

Digital Low-Dropout Regulator-Assisted Buck DC-DC Converter Achieving 68-mV Droop Voltage and 95.5% Efficiency 150 150
Author(s): Yichen Xu, Zhaoqing Wang, Rentao Wan, Suhwan Kim, Minxiang Gong, Ram Krishnamurthy, Xin Zhang, Mingoo Seok

Abstract:

This paper proposes a digital low-dropout regulator (DLDO)-assisted buck converter featuring one-step computational droop compensation and DLDO feedback-controlled current handover. The 28-nm test chip achieves a 68-mV droop voltage and a 112-ns settling time for a 1A/0.8ns load step while maintaining a high peak efficiency of 95.5%.

Published in: IEEE Solid-State Circuits Letters
Page(s): 1 – 1
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3581844
Publisher: IEEE

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