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A Logic-Compatible 2-Transistor Embedded Bipolar RRAM MACRO: A 28-nm Multiple-Time Programmable (MTP) Memory Without Extra Masks

A Logic-Compatible 2-Transistor Embedded Bipolar RRAM MACRO: A 28-nm Multiple-Time Programmable (MTP) Memory Without Extra Masks 150 150
Author(s): Yi Xiang Huang, Y. S. Lin, P. S. Huang, E. Ray Hsieh

Abstract:

This letter presents a 2-transistor (2T) bipolar embedded resistive RAM (eRRAM) MACRO fabricated in a 28-nm high-k metal gate (HKMG) process for multitime programmable (MTP) applications. To overcome the scaling bottlenecks of traditional embedded Flash, this work utilizes an extra-mask-free, pure front-end-of-line (FEOL) integration, offering a robust solution for automotive …

Published in: IEEE Solid-State Circuits Letters
Page(s): 117 – 120
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3675063
Publisher: IEEE

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A 7056-PPI Pixel Circuit With Low-Leakage Structure for Active-Matrix Monochrome Micro-LED Displays

A 7056-PPI Pixel Circuit With Low-Leakage Structure for Active-Matrix Monochrome Micro-LED Displays 150 150
Author(s): Chih-Lung Lin, Cheng-Han Ke, Yu-Chang Chiu, Yuan-Yu Lai, Yi-Chien Chen, Cheng-Rui Lu, Yu-Hsiang Fu, Chih-Chuan Huang

Abstract:

This work presents a 5T2C pixel circuit for active-matrix (AM) micro-displays in near-eye display applications. The circuit supports monochrome micro light-emitting diode (micro-LED) displays with ultrahigh resolution of 7056 pixels per inch (PPI). The circuit is designed and fabricated based on medium-voltage (MV) devices from the 55-nm high-voltage (HV) CMOS …

Published in: IEEE Solid-State Circuits Letters
Page(s): 89 – 92
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3667520
Publisher: IEEE

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A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms

A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms 150 150
Author(s): Javier Diaz-Fortuny, Erik Bury, Robin Degraeve, Ben Kaczer

Abstract:

Ring-oscillator (RO) circuits have historically been used to characterize the performance of CMOS technologies, as they can easily expose both process variability and aging through a straightforward circuit structure. ROs are widely employed to study degradation mechanisms such as bias temperature instability (BTI) and hot carrier degradation (HCD), which progressively …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3653472
Publisher: IEEE

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A 70-GHz Bandwidth Amplifier With Integrated Differential Bridged T-coil Peaking and Uniform Group Delay

A 70-GHz Bandwidth Amplifier With Integrated Differential Bridged T-coil Peaking and Uniform Group Delay 150 150
Author(s): Giovanni Scarlato, John R. Long

Abstract:

A two-stage amplifier in 22-nm FD-SOI CMOS integrates a fully-differential bridged T-coil for the first time. Circuit performance is benchmarked against an identical amplifier topology designed with single-ended T-coils (pseudo-differential) and an unpeaked reference. It realizes 70-GHz bandwidth with $12~\pm ~2$ -ps group delay and >10-dB return loss across 90 GHz. Bandwidth …

Published in: IEEE Solid-State Circuits Letters
Page(s): 65 – 68
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3661366
Publisher: IEEE

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Inverse Design of Multilayered Pixelated mm-Wave Power Amplifiers

Inverse Design of Multilayered Pixelated mm-Wave Power Amplifiers 150 150
Author(s): Vinay Chenna, Hossein Hashemi

Abstract:

A topology optimization methodology is presented for the design of multistage, multipath, linear and nonlinear millimeter-wave (mm-Wave) power amplifiers (PAs). Optimization algorithms autonomously generate complete multilayered PA core layouts, including actives and passives, with minimal human intervention in just a few days. Experimental results from fabricated linear and nonlinear W-band …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3656334
Publisher: IEEE

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Comprehensive Device to System Co-Design for SOT-MRAM at the 7 nm Node

Comprehensive Device to System Co-Design for SOT-MRAM at the 7 nm Node 150 150
Author(s): Piyush Kumar, Da Eun Shim, Azad Naeemi

Abstract:

This work presents a comprehensive spin-orbit torque (SOT)-based magnetic random access memory (MRAM) design at the 7 nm technology node, spanning from device-level characteristics to system-level power performance area (PPA). At the device level, we show the tradeoffs among the write current, error rate, and time, based on mircomagnetic simulations. …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 139 – 147
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3621279
Publisher: IEEE

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A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS

A 240-GHz Sub-THz Direct-Conversion Transmitter With I/Q Phase Calibration in 40-nm CMOS 150 150
Author(s): Chun-Sheng Lin, Chih-Hsueh Lin, Chun-Hsing Li

Abstract:

A 240-GHz direct-conversion transmitter (TX), consisting of an LO chain and fundamental I/Q mixers, is proposed for sub-THz communication applications. The LO chain integrates phase-shifter-embedded impedance matching networks (IMNs) and frequency tripler with an optimized harmonic IMN, delivering I/Q LO signals at 240 GHz with high output power, 360° phase …

Published in: IEEE Solid-State Circuits Letters
Page(s): 225 – 228
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3592246
Publisher: IEEE

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A 302.5-GHz 30.9-dB-Gain THz Amplifier in 65-nm CMOS

A 302.5-GHz 30.9-dB-Gain THz Amplifier in 65-nm CMOS 150 150
Author(s): Yu-Kai Chen, Yi-Fan Tseng, Wei-Zhe Su, Chun-Hsing Li

Abstract:

A 302.5-GHz high-gain CMOS THz amplifier is proposed in this work. An electromagnetic (EM) modeling approach, verified by transistor measurements, is employed to optimize transistor layout, effectively reducing gate resistance and drain-to-gate capacitance. This significantly enhances the transistor’s maximum oscillation frequency $f_{mathrm {max }}$ from 239.7 to 367.5 GHz. Furthermore, a $…

Published in: IEEE Solid-State Circuits Letters
Page(s): 165 – 168
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3574413
Publisher: IEEE

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