Detectors

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A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering

A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip With Event-Driven Detection and Spatial Clustering 150 150
Author(s): Arash Akhoundi, Pumiao Yan, Yawende Landbrug, Madeline Hays, Boris Murmann, E. J. Chichilnisky, Dante G. Muratore

Abstract:

This article presents a 1024-channel ultra-low-power spike sorting chip featuring event-driven spike detection and spatial clustering for large-scale neural recording. To address power and scalability constraints in brain–computer interfaces (BCIs), the design integrates a compressive analog-to-digital converter (ADC) with a two-stage spike detector that significantly reduces memory and processing …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3611139
Publisher: IEEE

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A 0.5-/0.95-dB NF, 50-/25-Ω Configurable CMOS Front-End ASIC for the Readout of Liquid Argon Calorimeter in the LHC

A 0.5-/0.95-dB NF, 50-/25-Ω Configurable CMOS Front-End ASIC for the Readout of Liquid Argon Calorimeter in the LHC 150 150
Author(s): Mietek Dabrowski, Filip Tavernier, Paul Leroux

Abstract:

This article presents the design of a four-channel front-end application specific integrated circuit (ASIC), ATLAS liquid argon front-end (ALFE), developed for the readout of the liquid-argon calorimeter (LAr) detector in the ATLAS experiment at the Large Hadron Collider (LHC). ALFE enables the readout of current signals induced in the LAr …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 15
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3602751
Publisher: IEEE

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A Linear Dynamic Voltage Scaling Technique With Adaptive Minimum Voltage Headroom Tracking for Implantable Neurostimulation

A Linear Dynamic Voltage Scaling Technique With Adaptive Minimum Voltage Headroom Tracking for Implantable Neurostimulation 150 150
Author(s): Kai Cui, Honglei Xu, Yingduo Duan, Yan Lu, Xiaoya Fan, Yanzhao Ma

Abstract:

This letter presents a linear dynamic voltage scaling (DVS) technique using a dual-loop multistage charge-pump maintaining the minimum voltage headroom for implantable neurostimulation. By adopting an analog DVS with adaptive feedback divider, the stimulus current source could be always kept operating at the boundary of the saturation region and the …

Published in: IEEE Solid-State Circuits Letters
Page(s): 261 – 264
Year of Publication: 2025
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3608096
Publisher: IEEE

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