Degradation

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Self-Heating and Parasitic Effects in Multi-Tier CFET Design

Self-Heating and Parasitic Effects in Multi-Tier CFET Design 150 150
Author(s): Sufia Shahin, Mahdi Benkhelifa, Yogesh Singh Chauhan, Hussam Amrouch

Abstract:

In this article, we study the impact of self-heating effects (SHEs) and middle of line (MOL) and back-end of line (BEOL) induced parasitics on multi-tier CFET design, where multiple nanosheet devices are vertically stacked. We analyze and compare the four-tier complementary FET (CFET) design with the conventional two-tier CFET, using …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 153 – 158
Year of Publication: 2026
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2026.3704373
Publisher: IEEE

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An 18.4-Gb/s/pin Simultaneous Bidirectional Transceiver for Post HBM4 Using Four-Phase Hybrid Timing Alignment and Dual Equalization

An 18.4-Gb/s/pin Simultaneous Bidirectional Transceiver for Post HBM4 Using Four-Phase Hybrid Timing Alignment and Dual Equalization 150 150
Author(s): Minchang Kim, Hankyu Chi, Sooncheol Kwon, Icsu Oh, Seulgi Kim, Heewoong Song, Daeho Yun, Jaehong Jeong, Daejoon Kim, Kichul Hong, Jeonghyun Park, Woo-Seok Choi, Hae-Kang Jung, Hoyoung Son, Inchul Jeong, Hyungsoo Kim, Jonghwan Kim

Abstract:

This letter presents a simultaneous bidirectional (SBD) transceiver for post HBM4. It is difficult to increase the data rate due to poor channel characteristics of the silicon interposer and the limited physical area of the IO in high-bandwidth memory (HBM) interface. SBD signaling is attractive because it doubles the per-pin …

Published in: IEEE Solid-State Circuits Letters
Page(s): 182 – 185
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2026.3696268
Publisher: IEEE

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A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms

A Modular Ring-Oscillator Array Chip for Accurate Stress Testing of CMOS Aging Mechanisms 150 150
Author(s): Javier Diaz-Fortuny, Erik Bury, Robin Degraeve, Ben Kaczer

Abstract:

Ring-oscillator (RO) circuits have historically been used to characterize the performance of CMOS technologies, as they can easily expose both process variability and aging through a straightforward circuit structure. ROs are widely employed to study degradation mechanisms such as bias temperature instability (BTI) and hot carrier degradation (HCD), which progressively …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3653472
Publisher: IEEE

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A Broadband and Compact GaN Millimeter-Wave MMIC SPDT Switch Using Modified π-Networks

A Broadband and Compact GaN Millimeter-Wave MMIC SPDT Switch Using Modified π-Networks 150 150
Author(s): Chaorong Wang, Quan Pan, Xiaohu Fang

Abstract:

This letter presents a design methodology for broadband and compact millimeter-wave (mm-wave) single-pole double-throw (SPDT) switches targeting the Ku–Ka band. Conventional SPDT switches based on quarter-wavelength transmission line typically occupy significant chip area, while alternative designs utilizing standard $\pi $ -type equivalent circuits often suffer from bandwidth degradation due to …

Published in: IEEE Solid-State Circuits Letters
Page(s): 21 – 24
Year of Publication: 2026
Electronic ISSN: 2573-9603
DOI: 10.1109/LSSC.2025.3646815
Publisher: IEEE

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Impact of Aging, Self-Heating, and Parasitics Effects on NSFET and CFET

Impact of Aging, Self-Heating, and Parasitics Effects on NSFET and CFET 150 150
Author(s): Swati Deshwal, Sufia Shahin, Anirban Kar, Yogesh S. Chauhan, Hussam Amrouch

Abstract:

This work presents a comparative analysis of complementary field-effect transistor (CFET) and nanosheet FET (NSFET) architectures, with a focus on self-heating effects (SHEs), negative bias temperature instability (NBTI), hot carrier degradation (HCD), and the impact of back-end-of-line (BEOL) parasitics on standard cell performance. NBTI degradation is modeled using a framework …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 188 – 196
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3624653
Publisher: IEEE

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A Low-Power Blocker-Tolerant Wideband Receiver With Bias-Tunable Mixer and Effective Switch Resistance Compensation

A Low-Power Blocker-Tolerant Wideband Receiver With Bias-Tunable Mixer and Effective Switch Resistance Compensation 150 150
Author(s): Rundi Wu, Yetong Wang, Ran Hong, Zongle Ma, Kenan Xie, Fanyi Meng, Kaixue Ma, Keping Wang

Abstract:

This article presents a mixer-first blocker-tolerant receiver (RX) with effective switch resistance ( ${R} _{\text {SW}}$ ) compensation and high-Q selectivity. By analyzing the impact of non-ideal 1/N LO duty cycle and effective ${R} _{\text {SW}}$ on mixer-first RX, an effective ${R} _{\text {SW}}$ compensation technique is proposed to mitigate noise figure (…

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1554 – 1569
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3529681
Publisher: IEEE

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