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A 12 b 180-MS/s Pipelined-SAR ADC With a Low-Power Calibration-Free RA and Hardware-Efficient SAR Logic

A 12 b 180-MS/s Pipelined-SAR ADC With a Low-Power Calibration-Free RA and Hardware-Efficient SAR Logic 150 150

Abstract:

This letter presents a 12-bit, 180-MS/s pipelined-SAR ADC in 65-nm CMOS. To eliminate the complex interstage gain-error calibration for a fast-response characteristic, a high-gain residue amplifier (RA) featuring a two-stage gain-boosting architecture is proposed. By removing the tail current, the RA significantly alleviates slew-rate and voltage headroom limitations. The …

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A Noise-Shaping SAR-Based ExG Sensing Frontend With Dynamic Input-Impedance Boosting and Prediction-Assisted Mismatch-Shaping DEM

A Noise-Shaping SAR-Based ExG Sensing Frontend With Dynamic Input-Impedance Boosting and Prediction-Assisted Mismatch-Shaping DEM 150 150

Abstract:

This article presents a noise-shaping successive approximation register (NS-SAR)-based direct-digitizing electrophysiological (ExG) sensing frontend (SFE) fabricated in a standard 180-nm CMOS process. To address the challenges of large motion artifacts and high electrode–tissue impedance (ETI), we propose three key innovations in our proposed SFE that enable accurate ExG …

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Energy-Efficient Reconfigurable XGBoost Inference Accelerator With Modular Unit Trees via Selective Node Execution and Data Movement

Energy-Efficient Reconfigurable XGBoost Inference Accelerator With Modular Unit Trees via Selective Node Execution and Data Movement 150 150

Abstract:

The extreme gradient boosting (XGBoost) has emerged as a powerful AI algorithm, achieving high accuracy and winning multiple Kaggle competitions in various tasks including medical diagnosis, recommendation systems, and autonomous driving. It has great potential for running on edge devices due to its binary tree-based simple computing kernel, offering unique …

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