PAPER FORMAT DESCRIPTION
Papers can have 2 parts – the first part is a 4-8 page main paper (following a strict format – template available from website), and the second part is the supplementary material. The main paper itself will just focus on describing why the work is important, the state of the prior art, the key new accomplishment(s) or results, and then what the research directions are going forward. The main paper can have an accompanying supplementary material (detailed methods) part. The supplementary material is not mandatory, but authors are strongly encouraged to submit supplementary material, which will increase the chance of acceptance. The Supplementary material (detailed methods) will be peer reviewed along with the main paper. The ScholarOne website will have the guidelines for the two part submission – the main and the supplementary material.
JXCDC IS AN OPEN ACCESS ONLY PUBLICATION
Charge for Authors: $1,350 USD per paper
Paper submissions must be done through the ScholarOne Manuscripts website: https://mc.manuscriptcentral.com/jxcdc
Guidelines for papers and supplementary materials, as well as a paper template, are provided at this website.
Please use this Word document as a template for your submission to the JxCDC Journal.
This is an “Open Access” IEEE journal for the publication in multi-disciplinary fields of research towards solid-state circuits using exploratory materials and devices for novel energy efficient computation beyond standard CMOS (Complementary Metal Oxide Semiconductor) transistor technology. The focus of the publication is to be on the exploration of materials, devices and computation circuits to enable Moore’s Law to continue for computation beyond a 10 to 15 year horizon (beyond end of the roadmap for CMOS technologies) with the associated density scaling and improvement in energy efficiency. Examples of appropriate topics to submit would be research milestones in the integration of exploratory materials, devices and computation circuits based upon any of the following:
• Quantum electronic charge based devices (e.g. tunneling)
• Spintronics and Nanomagnetics devices
• Straintronics (piezo-electric) devices
• Functional materials
• High fan-in, fan-out logic circuits based on new devices
• Reconfigurable and non-volatile computation circuits
• Computation circuits comprehending the on-chip communication means
This publication provides a unique interdisciplinary forum of scientists and engineers to critique and document progress in this field of promising alternatives to CMOS technology for computation devices, circuits and architecture.
The publication is designed for fast publication of results unifying the areas of solid-state materials, devices, and circuits for novel computation (logic, memory, and communication) towards the exploration for the beyond CMOS technology. The publication is not limited to digital information processing, but also encompasses non-Boolean computation - including analog, neuromorphic computation, and novel concepts in computer automata. It is envisioned that these exploratory methods of computation could augment CMOS.
Research is preferred in materials, devices, and circuits that transcend, unify, and extend these subject boundaries to the next level of integration. Manuscripts on materials are welcomed as long as they explicitly show a path to a device application and have impact. Also, manuscripts on devices are welcomed as long as they show potential to have application in an integrated circuit for computation. Publications on computation circuits and systems are appropriate if they are based on concrete exploratory devices.
The Journal of Exploratory Solid-State Computational Devices and Circuits (JXCDC) provides a common venue for researchers in these fields to identify, distill, test and develop ideas for manufacturable information technology and consumer electronic technologies, enabling continuous scaling of accessible computational power.
By its nature, the JXCDC is a publication that connects materials, devices, and circuits vertically and specifically in the area of energy-efficient computation. It is a selective research publication that scientists and engineers can read to follow developments in beyond CMOS for energy efficient computation.