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SUMMARY:Integrated Circuits for BMS Applications - Thierry Cassagnes | SSCS October Technical Webinar
DESCRIPTION:Abstract:\nBattery management systems (BMS) are a key enabler of electrification\, ensuring the safe\, reliable\, and efficient operation of battery packs used in electric vehicles\, energy storage systems\, industrial equipment\, and other emerging applications. At the core of every BMS are integrated circuits responsible for voltage\, current\, and temperature sensing\, cell balancing\, diagnostics\, and protection. \nThis webinar reviews the integrated circuits used in modern battery management systems\, with a focus on cell-voltage monitoring and current-sensing technologies. The presentation discusses how battery characteristics such as narrow operating voltage limits\, temperature dependence\, aging\, and cell-to-cell variations drive the requirements for analog and mixed-signal ICs. It also covers BMS architectures\, balancing techniques\, and functional safety considerations. \nThe objective is to provide circuit designers and researchers with a system-level understanding of the technologies enabling safe and efficient electrification. \n \n\nSpeaker: Thierry Cassagnes\, NXP Fellow \nTime: 11:00 AM ET \nRegister for the WebEx Webinar ➔\n\n \n\n \nAbout the Speaker\n\n\n \n\n \n\nThierry Cassagnes\nNXP Fellow\, IC Designer & Architect \nThierry Cassagnes is an NXP Fellow\, IC designer\, and architect with more than 30 years of experience in the semiconductor industry\, primarily focused on analog and mixed-signal Integrated Circuit design. He received an Engineering degree in Microelectronics from the Institut National des Sciences Appliquées (INSA)\, Toulouse\, France\, in 1991. \nOver his career at STMicroelectronics\, Motorola SPS\, Freescale Semiconductor\, and NXP Semiconductors\, he has contributed to the architecture\, design\, and development of integrated circuits and systems for video\, wireless\, automotive\, motion sensing\, and energy management applications in both France and the United States. \nHis current work focuses on the architecture and design of integrated circuits for electrification\, with a particular emphasis on advanced battery management solutions for electric mobility and energy storage systems.
URL:https://sscs.ieee.org/event/integrated-circuits-for-bms-applications-thierry-cassagnes-sscs-october-technical-webinar/
LOCATION:Online
CATEGORIES:Technical Webinars,Upcoming Events,Webinars
ATTACH;FMTTYPE=image/png:https://sscs.ieee.org/wp-content/uploads/October-2026-Technical-Webinar-Social-Post-1.png
ORGANIZER;CN="SSCS Technical Webinars":MAILTO:d.marinese@ieee.org
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/New_York:20261123T093000
DTEND;TZID=America/New_York:20261123T113000
DTSTAMP:20261002T145440Z
CREATED:20260929T020647Z
LAST-MODIFIED:20261002T145440Z
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SUMMARY:Designing Intelligent Neural Interface SoCs - Mahsa Shoaran | SSCS November Technical Webinar
DESCRIPTION:Abstract:\nIn the past decade\, there has been a growing interest in developing AI-embedded neural interfaces for various neurological disorders and brain-computer interface (BCI) applications. The focus has shifted from raw signal acquisition and data compression for off-body processing to intelligent systems featuring on-site signal processing\, neural biomarker extraction\, and AI. In this webinar\, I will discuss the key characteristics\, design trade-offs\, and recent advances in CMOS-based systems-on-chip (SoCs) for diverse categories of intelligent neural prostheses\, including real-time symptom tracking and closed-loop stimulation\, intelligent BCIs for movement and communication recovery following paralysis or spinal cord injury\, and beyond. \nBuilding on these foundations\, I will present recent directions pushing the field forward: compute-in-memory processors that enable low-power neural decoding\, processors that generalize to unseen patients without patient-specific training\, and advanced decoders for motion-intention and brain-to-text applications. Throughout\, silicon results from recent prototypes illustrate the circuit- and system-level design choices that make implant-scale intelligence practical\, and the discussion closes with open challenges and an overview of where the field is heading. \n \n\nSpeaker: Prof. Mahsa Shoaran (EPFL) \nDate: Monday\, November 23\, 2026 \nTime: 9:30 AM ET \nRegister for the WebEx Webinar ➔\n\n \n\n \nAbout the Speaker\n\n\n \n\n \n\nProf. Mahsa Shoaran\nAssociate Professor\, EPFL | Director\, Integrated Neurotechnologies Laboratory \nMahsa Shoaran is currently an Associate Professor in Electrical and Micro Engineering and Neuro-X at EPFL and Director of the Integrated Neurotechnologies Laboratory. From 2018 to 2020\, she was an Assistant Professor of ECE at Cornell University\, and a Postdoctoral Fellow at Caltech from 2015 to 2017. She received her Ph.D. from EPFL in 2015 and her B.Sc. and M.Sc. from Sharif University of Technology. \nDr. Shoaran is a recipient of the ERC Starting Grant (2021) and the Google Faculty Research Award in Machine Learning and Data Mining (2019). Her team received the IEEE SSCS–Brain Best Paper Award in 2022. Her research focuses on low-power integrated circuit design for implantable systems\, machine-learning algorithms and hardware for intelligent neural interfaces\, and brain-computer interfaces. \nProf. Shoaran serves (or has served) on the Technical Program Committees of the IEEE ISSCC\, CICC\, and NER\, as a TBioCAS Associate Editor\, and on the ISSCC SRP committee.
URL:https://sscs.ieee.org/event/designing-intelligent-neural-interface-socs-mahsa-shoaran-sscs-november-technical-webinar/
LOCATION:Online
CATEGORIES:Technical Webinars,Upcoming Events,Webinars
ATTACH;FMTTYPE=image/png:https://sscs.ieee.org/wp-content/uploads/November-2026-Technical-Webinar-Social-Post-1.png
ORGANIZER;CN="SSCS Technical Webinars":MAILTO:d.marinese@ieee.org
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/New_York:20261207T100000
DTEND;TZID=America/New_York:20261207T113000
DTSTAMP:20261002T145618Z
CREATED:20260929T022337Z
LAST-MODIFIED:20261002T145618Z
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SUMMARY:Gallium Nitride: The Next Silicon? - Nadine Collaert | SSCS December Technical Webinar
DESCRIPTION:Abstract:\nSilicon\, and in particular CMOS technology\, has been the workhorse of the semiconductor industry for several decades. Its combination of manufacturing maturity\, cost efficiency\, scalability\, and high integration density has made CMOS the dominant platform for a wide range of applications\, from consumer electronics to data centers. However\, silicon is not always the optimal material for delivering very high-power levels or operating at extremely high frequencies. In these domains\, III-V semiconductor materials often offer superior performance owing to their favorable electronic properties. \nAmong these materials\, gallium nitride (GaN) has attracted significant attention in recent years. Its wide bandgap\, high breakdown voltage\, and excellent electron transport characteristics make it particularly well-suited for power electronics and RF applications\, while emerging opportunities are also being explored in photonics. In this lecture\, we will provide an overview of the GaN industry and technology landscape\, with a particular focus on RF applications. We will also discuss the growing importance of GaN for next-generation computing infrastructure\, including efficient power delivery solutions for AI-driven data centers and high-performance communication systems. \n \n\nSpeaker: Nadine Collaert (Imec Fellow & Professor at VUB) \nDate: Monday\, December 7\, 2026 \nTime: 10:00 AM ET \nRegister for the WebEx Webinar ➔\n\n \n\n \nAbout the Speaker\n\n\n \n\n \n\nNadine Collaert\nImec Fellow | Part-time Professor\, VUB \nNadine Collaert is an imec fellow and part-time professor at VUB (Brussels\, Belgium). She is currently leading the technology office in the connected computing sector\, focusing on identifying cutting-edge advancements in wireless\, wireline\, and optical communications\, as well as emerging computing technologies\, to drive future innovation. \nBefore that\, she was responsible for the advanced RF program\, looking at heterogeneous integration of III-V/III-N devices with advanced CMOS to tackle the challenges of next-generation mobile communication. Prior to that\, she was program director of the LOGIC Beyond Si program focused on research into novel CMOS devices and new material-enabled device and system approaches to increase functionality. \nShe has been involved in the theory\, design\, and technology of FinFET devices\, emerging memories\, transducers for biomedical applications\, and the integration and characterization of biocompatible materials. She holds a Ph.D. in electrical engineering from KU Leuven\, has authored more than 500 publications\, and holds over 15 patents in device design and process technology.
URL:https://sscs.ieee.org/event/gallium-nitride-the-next-silicon-nadine-collaert-sscs-december-technical-webinar/
LOCATION:Online
CATEGORIES:Technical Webinars,Upcoming Events,Webinars
ATTACH;FMTTYPE=image/png:https://sscs.ieee.org/wp-content/uploads/December-2026-Technical-Webinar-Social-Post-.png
ORGANIZER;CN="SSCS Technical Webinars":MAILTO:d.marinese@ieee.org
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