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JxCDC SSCS Open Journal Webinar: A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

Date
2024-02-06
Time
11:00 AM ET
Location
Webinar - Online
Contact
Aeisha VanBuskirk – a.vanbuskirk@ieee.org
Web site
https://ieee.webex.com/weblink/register/r7b3d58bea74656bea146c606e761e12c
Sponsorship
Sponsor
Presenter
Kerem Camsari and Shuvro Chowdhury
Description

Title: A full-stack view of probabilistic computing with p-bits: devices, architectures and algorithms


Abstract: The transistor celebrated its 75th birthday in 2022. The continued scaling of the transistor defined by Moore’s Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.


Bio: Kerem Camsari is an Assistant Professor at the Department of Electrical and Computer Engineering at the University of California, Santa Barbara since 2020.


His Ph.D. work established a modular approach to connect a growing set of emerging materials and phenomena to circuits and systems, a framework adopted by others. In later work, he used this approach to establish the concept of p-bits and p-circuits as a bridge between classical and quantum circuits to design efficient, domain-specific hardware accelerators for the beyond-More era of electronics.


He is a founding member of the Technical Committee on Quantum, Neuromorphic, and Unconventional Computing within the IEEE Nanotechnology Council where he currently leads the Unconventional Computing section. He has received the IEEE Magnetics Society Early Career Award, the ONR Young Investigator Award, and the NSF CAREER award for his work on probabilistic computing. He is a senior member of the IEEE.


Bio: Shuvro Chowdhury received his B.S. and M.S. degrees in Electrical and Electronic Engineering from Bangladesh University of Engineering and Technology, Bangladesh, and the Ph.D. degree in Electrical and Computer engineering from Purdue University, West Lafayette, IN, in 2022.


Since 2022, he has been a postdoctoral scholar with the Electrical and Computer Engineering Department, University of California Santa Barbara, Santa Barbara. His research interests include probabilistic and quantum computing, hardware acceleration, modeling and simulation of nanoscale electronic devices and machine learning.