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High Speed Op-Amp Design: Compensation and Topologies for Two and Three Stage Designs, Presented by Jake Baker

High Speed Op-Amp Design: Compensation and Topologies for Two and Three Stage Designs
Webinar - Online
Michael Kelly –
Web site




As CMOS technology continues to evolve, the supply voltages are decreasing while at the same time the transistor threshold voltages are remaining relatively constant. Making matters worse, the inherent gain available from the nano-CMOS transistors is dropping. Traditional techniques for achieving high gain by vertically stacking (i.e. cascoding) transistors becomes less useful in sub-100nm processes. Horizontal cascading (multi-stage) must be used in order to realize op-amps in low supply voltage processes. This seminar discusses new design techniques for the realization of multi-stage op-amps. Both single- and fully-differential op-amps are presented where low power, small VDD, and high speed are important. The proposed, and experimentally verified, op-amps exhibit significant improvements in speed over the traditional op-amp designs while at the same time having smaller layout area.


Russel Jacob (Jake) Baker (S’83-M’88-SM’97-F'13) was born in Ogden, Utah, on October 5, 1964. He received the B.S. and M.S. degrees in electrical engineering from the University of Nevada, Las Vegas, in 1986 and 1988. He received the Ph.D. degree in electrical engineering from the University of Nevada, Reno in 1993. His Google scholar profile is located here.

From 1981 to 1987 he served in the United States Marine Corps Reserves (Fox Company, 2nd Battalion, 23rd Marines, 4th Marine Division). From 1985 to 1993 he worked for E. G. & G. Energy Measurements and the Lawrence Livermore National Laboratory designing nuclear diagnostic instrumentation for underground nuclear weapons tests at the Nevada test site. During this time he designed over 30 electronic and electro-optic instruments including high-speed fiber-optic receiver/transmitters, PLLs, frame- and bit-syncs, data converters, streak-camera sweep circuits, Pockell’s cell drivers, micro-channel plate gating circuits, and analog oscilloscope electronics. In 1991-1992 he was an adjunct faculty member in the department of electrical engineering at the University of Nevada, Las Vegas (UNLV). From 1993 to 2000 he served on the faculty in the department of electrical engineering at the University of Idaho. In 2000 he joined a new electrical and computer engineering program at Boise State University (BSU) where he served as department chair from 2004 to 2007. At BSU he helped establish graduate programs in electrical and computer engineering including, in 2006, the university’s second PhD degree. In 2012 he re-joined the faculty at UNLV where he is currently a Professor of Electrical and Computer Engineering. In addition to this industry and academic experience, he has done technical and expert witness consulting for numerous companies and laboratories.

Over the last 30 years his research and development interests have been, or currently are, focused on the design of diagnostic electrical and electro-optic instrumentation for scientific research, integrated electrical/biological circuits and systems, array (memory, imagers, and displays) circuit design, CAD tool development and online tutorials, low-power interconnect and packaging techniques, design of communication/interface circuits, circuit design for the use and storage of renewable energy, power electronics, and the delivery of online engineering education.

Professor Baker holds 137 US patents. He is a member of the honor societies Eta Kappa Nu and Tau Beta Pi, a licensed Professional Engineer, a popular lecturer that has delivered over 50 invited talks around the world, an IEEE Fellow, and the author of the books CMOS Circuit Design, Layout, and SimulationCMOS Mixed-Signal Circuit Design, and a coauthor of DRAM Circuit Design: Fundamental and High-Speed Topics. He received the 2000 Best Paper Award from the IEEE Power Electronics Society, the 2007 Frederick Emmons Terman Award, and the 2011 IEEE Circuits and Systems Education Award. He currently serves on, or has served on, the IEEE Press Editorial Board (1999-2004), as editor for the Wiley-IEEE Press Book Series on Microelectronic Systems (2010-present), the IEEE Solid-State Circuits Society (SSCS) Administrative Committee (2011-2016), as a Distinguished Lecturer for the SSCS (2013-2014), and as the Technology Editor (2012-2014) and Editor-in-Chief (2015 - present) for the IEEE Solid-State Circuits Magazine.