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"Energy Efficient Nyquist-Rate ADCs" - Presented by Klaas Bult

Date
2020-06-24
Time
10:00 AM ET
Location
Webinar - Online
Contact
Abira Altvater – abira.altvater@ieee.org
Description
Abstract: In large SoC’s, data converters take a dominant position both from a performance point of view as well as from an energy consumption point of view. The past two decades have shown a strongly intensified search for more power efficient data converters, in particular power efficient ADCs. This presentation will focus on power efficiency of Nyquist-rate ADCs and discuss what has been proposed in open literature to reduce the energy consumption, both from a circuit point of view as well as from an architectural point of view. To get a good grasp of how circuit and architectural choices affect the power consumption, a method will be introduced that allows a quick estimation of the power consumption of an ADC, based on the required SNDR, the sampling frequency, the used technology as well as the chosen ADC architecture and circuit implementations. The proposed method enables a comparison based on these choices and can show what their impact is on the power efficiency, without going through the elaborate design of several architectures. It also shows which recent inventions made a large impact on power efficiency and how these inventions can also be of use in other architectures than the ones they have been introduced in.
Bio: Klaas Bult received an MSc. and a PhD. degree from Twente University in 1984 and 1988 respectively. From 1988 to 1994 he worked as a Research Scientist at Philips Research Labs, where he worked on Analog CMOS Building Blocks, mainly for application in Video and Audio Systems. In 1993-1994 he was also a part-time professor at Twente University. From 1994 to 1996 he was an associate professor at UCLA, where he worked on Analog and RF Circuits for Mixed-Signal Applications. In the same period he was also a consultant with Broadcom Corporation, in Los Angeles, CA and later in Irvine, CA, during which he started the Analog Design Group at Broadcom. In 1996 he joined Broadcom full-time as a Director, responsible for Analog and RF Circuits for embedded applications in broadband communication systems. In 1999 he became a Sr. Director and started Broadcom’s Design Center in Bunnik, The Netherlands. In 2005 he was appointed Vice President and CTO of Central Engineering. As of 2016 he’s an independent consultant Analog IC Design, operating from The Netherlands. Klaas Bult is an author of more than 60 international publications and holds more than 60 issued US patents. He is a Broadcom Fellow, an IEEE Fellow, was awarded the Lewis Winner Award for outstanding conference paper on ISSCC 1990, 1992 and 1997, was co-recipient of the Jan Van Vessem best European Paper Award at ISSCC 2004 and the Distinguished paper Award of ISSCC 2014. He was also awarded the ISSCC Best Evening Panel Award in 1997 and 2006 and the Best Forum Speaker Award at ISSCC 2011. Klaas Bult has served more than 12 years on the ISSCC Technical Program Committee, 18 years on the ESSCIRC Technical Program Committee and 7 years as a member of the ESSCIRC/ESSDERC Steering Committee.

 

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