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Cryogenic CMOS Interfaces for Large-Scale Quantum Computers

Date
2019-06-27
Time
10:00 AM ET
Location
Webinar - Online
Contact
Abira Altvater – abira.altvater@ieee.org
Presenter
Prof. Fabio Sebastiano
Description
Abstract: Quantum computers hold the promise to ignite the next technological revolution as the classical computer did for last century’s digital revolution, by efficiently solving problems that are intractable by today’s computers. By enabling the efficient simulation of quantum systems, quantum computing will allow both the optimization of existing industrial processes and the synthesis of new drugs and materials, thus representing an unprecedented game changer with the potential to disrupt entire industries, create new ones and radically change our lives. 
Quantum computers rely on processing the information stored in quantum bits (qubits) that must be typically cooled well below 1 K for proper operation. Performing operations on qubits requires a classical (i.e. non-quantum) electronic interface, which is currently implemented at room temperature for the few qubits available today. However, future quantum processors will comprise thousands or even millions of qubits. To avoid the unpractical requirement of thousands of cables from the cryogenic refrigerator to the room-temperature electronics, the electronic interface must operate at cryogen¬ic temperatures as close as possible to the qubits.
This talk will address the challenges of building such a scalable cryogenic electronic interface, focusing on the use of standard CMOS technology. A brief introduction to quantum computers and their operation will be given, followed by a description of their hardware implementation and their requirements in terms of electronic control and read-out. To enable the reliable design of cryogenic circuits, two main ingredients are required: on one hand, compact models for the cryogenic CMOS devices and, on the other hand, a comprehensive methodology to co-design the electronics and the quantum processor. After addressing those aspects, we will demonstrate the design and the functionality of complex analog and digital systems operating at 4 K, thus showing that cryogenic CMOS is a viable technology to enable large-scale quantum computing.
Biography: Fabio Sebastiano holds degrees from University of Pisa, Italy (B.Sc., 2003, cum laude; M.Sc., 2005, cum laude), from Sant'Anna School of Advanced Studies, Pisa, Italy (M.Sc., 2006, cum laude) and from Delft University of Technology, The Netherlands (Ph.D., 2011).
From 2006 to 2013, he was with NXP Semiconductors Research in Eindhoven, The Netherlands, where he conducted research on fully integrated CMOS frequency references, nanometer-CMOS temperature sensors and area-efficient interfaces for magnetic sensors. In 2013, he joined Delft University of Technology, where he is currently an Assistant Professor (tenured). His main research interests are cryogenic electronic interfaces, quantum computation, fully-integrated frequency references and electronic interfaces for smart sensors.
Dr. Sebastiano holds 10 patents, and has co-authored 1 book and over 60 technical publications. He has given invited talks and courses at several international conferences including the International Solid-State Circuits Conference (ISSCC). He was co-recipient of the 2008 ISCAS Best Student Paper Award and of the 2017 DATE best IP award. Fabio serves as TPC member of the IEEE RFIC Symposium in the “Emerging technologies” subcommittee and as associate editor of the IEEE Transactions on Very Large Scale Integration Systems (TVLSI). He is a senior member of IEEE and a Distinguished Lecturer of the IEEE Solid-State Circuit Society.

 

Event Recording
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