"Scaling Analog Circuits: Why and How", Presented by Peter Kinget
- 12:00 PM
- Webinar - Online
- Abira Sengupta – Abira.Sengupta@ieee.org
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Abstract: CMOS technology scaling has fueled tremendous progress in electronics and has brought about system-on-chip (SoC) products with a broad impact on our society and economy. Technology scaling is very beneficial to increase the performance and density for digital signal processing, computation and memory. Analog circuits remain the critical interfaces to connect the digital cores of SoCs to the physical world and need to satisfy increasing performance demands. At the same time, designing analog functions with scaled devices and reducing supply voltages is getting progressively harder. Meeting more stringent performance requirements with poorer analog devices makes the task of the analog designer very challenging and interesting. I will review scaling challenges for analog circuit performance and contrast them to digital circuit scaling. Next I will discuss design paradigms that address analog circuit scaling, including mixed-domain analog techniques. The talk will also touch upon the novel application opportunities that scaled CMOS technologies enable. Work in collaboration with C.W. Hsu, J. Kuppambatti and B. Vigraham.
Bio: Peter R. Kinget received the engineering and Ph.D. degrees in electrical engineering from the Katholieke Universiteit Leuven, Belgium, in 1990 and 1996, respectively. From 1996 to 1999 he was a Member of Technical Staff at Bell Laboratories, Murray Hill, NJ. From 1999 to 2002 he held various technical and management positions in IC design and development at Broadcom, CeLight and MultiLink. He joined the faculty of the Department of Electrical Engineering, Columbia University, NY in 2002 where he currently serves as a Professor. He is also a consulting expert on patent litigation and a technical consultant to industry. His research interests are in analog, RF and power integrated circuits and the applications they enable in communications, sensing, and power management. He is widely published in journals and conferences, has co-authored 3 books and holds 17 US patents. Dr. Kinget is a Fellow of the IEEE. He has been an Associate Editor of the IEEE Journal of Solid State Circuits and the IEEE Transactions on Circuits and Systems II. He has served on the Technical Program Committees of the IEEE Custom Integrated Circuits Conference, the Symposium on VLSI Circuits, the European Solid-State Circuits Conference, and the International Solid-State Circuits Conference. He currently is a “Distinguished Lecturer” for the IEEE Solid-State Circuits Society, a member of the Board of the Armstrong Memorial Research Foundation and an elected member of the IEEE Solid-State Circuits Society Adcom. He is a co-recipient of the “Best Student Paper Award – 1st Place” at the 2008 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium; of the “First Prize” in the 2009 Vodafone Americas Foundation Wireless Innovation Challenge; of the “Best Student Demo Award” at the 2011 ACM Conference on Embedded Networked Sensor Systems (ACM SenSys); of the “2011 IEEE Communications Society Award for Advances in Communication” for an outstanding paper in any IEEE Communications Society publication in the past 15 years; and of the “First Prize ($100K)” in the 2012 Interdigital Innovation Challenge (I2C).
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