IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

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A Bit-Cell Failure Analysis Framework for Ferroelectric Field-Effect Transistor-Based Memories

A Bit-Cell Failure Analysis Framework for Ferroelectric Field-Effect Transistor-Based Memories 150 150
Author(s): Jianze Wang, Wei Zhang, Xuanyao Fong

Abstract:

The ferroelectric field-effect transistor (FeFET) is a promising memory device technology due to desirable attributes, such as fast access times, high memory cell density, good endurance, compatibility with CMOS process, and impressive scalability. While previous research has explored the impact of process variations at the device level, their effects on …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 123 – 130
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3616007
Publisher: IEEE

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3-D Stacked HBM and Compute Accelerators for LLM: Optimizing Thermal Management and Power Delivery Efficiency

3-D Stacked HBM and Compute Accelerators for LLM: Optimizing Thermal Management and Power Delivery Efficiency 150 150
Author(s): Janak Sharda, Madison Manley, Jungyoun Kwak, Chinsung Park, Muhannad Bakir, Shimeng Yu

Abstract:

Advanced packaging is becoming essential for designing hardware accelerators for large language models (LLMs). Different architectures, such as 2.5-D integration of memory with logic, have been proposed; however, the bandwidth limits the throughput of the complete system. Recent works have proposed memory on logic systems, where high bandwidth memory (HBM) …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 116 – 122
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3617298
Publisher: IEEE

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Reference-Load Sharing Scheme: An Area- and Energy-Efficient Nonvolatile Register Design Using MTJ Devices

Reference-Load Sharing Scheme: An Area- and Energy-Efficient Nonvolatile Register Design Using MTJ Devices 150 150
Author(s): Masanori Natsui, Tomoo Yoshida, Takahiro Hanyu

Abstract:

This article proposes a circuit configuration for an area- and energy-efficient nonvolatile register using magnetic tunnel junction (MTJ) devices, suitable for persistent computation in intermittent computing environments. The proposed configuration, named the reference-load sharing scheme (RLSS), stores 1 bit of information using the resistance of a dedicated MTJ device and a …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 90 – 98
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3611365
Publisher: IEEE

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FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability

FIMA: A Scalable Ferroelectric Compute-in-Memory Annealer for Accelerating Boolean Satisfiability 150 150
Author(s): Mohammad Khairul Bashar, T. H. Pantha, Z. Li, M. Farasat, S. Datta, V. Narayanan, S. Dutta, N. Shukla

Abstract:

In-memory compute kernels present a promising approach for addressing data-centric workloads. However, their scalability—particularly for computationally intensive tasks solving combinatorial optimization problems such as Boolean satisfiability (SAT), which are inherently difficult to decompose—remains a significant challenge. In this work, we propose a ferroelectric nonvolatile memory (NVM)-based compute-in-memory …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 81 – 89
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3603942
Publisher: IEEE

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Polar-Axis Orientation Fluctuations and the Impact on the Intrinsic Variability in Ferroelectric Capacitors

Polar-Axis Orientation Fluctuations and the Impact on the Intrinsic Variability in Ferroelectric Capacitors 150 150
Author(s): Wei Zhang, Jianze Wang, Xuanyao Fong

Abstract:

We utilized phase-field simulations to investigate the effects of polar-axis (PA) orientation fluctuations on the extrinsic properties of single ferroelectric (FE) grains, focusing on the coercive electrical field (EC) and the remnant polarization (Pr). The underlying mechanisms through which PA orientation fluctuations influence polarization behavior are studied to gain insights …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 74 – 80
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3586589
Publisher: IEEE

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Reconfigurable Ferroelectric Bandpass Filter With Low-Frequency Noise Analysis for Intracardiac Electrogram Monitoring

Reconfigurable Ferroelectric Bandpass Filter With Low-Frequency Noise Analysis for Intracardiac Electrogram Monitoring 150 150
Author(s): Jianwei Jia, Zhenge Jia, Omkar Phadke, Yiyu Shi, Shimeng Yu

Abstract:

Implantable cardioverter defibrillators (ICDs) provide real-time monitoring and immediate defibrillation for life-threatening arrhythmias. However, the intracardiac electrogram (IEGM) acquisition of ICDs faces stringent constraints, including power consumption, low-frequency noise, and patient-specific physiological variability. This article introduces an ultralow-power, high-resolution, reconfigurable three-stage bandpass filter designed specifically for IEGM, utilizing ferroelectric field-effect …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 67 – 73
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3584711
Publisher: IEEE

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A Passive and Scalable High-Order Neuromorphic Circuit Enabled by Mott Memristors

A Passive and Scalable High-Order Neuromorphic Circuit Enabled by Mott Memristors 150 150
Author(s): Zikang Lin, Xiaohui Wu, Shujing Zhao, Weihua Liu, Xin Li, Li Geng, Chuanyu Han

Abstract:

In this study, VO2 Mott memristors have been successfully fabricated, leading to the proposal of a passive and scalable high-order neural circuit. This circuit consists of two coupled VO2 Mott memristors, two resistors, and three capacitors. The proposed high-order neural circuit demonstrates 11 distinct firing behaviors similar to those of biological …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 60 – 66
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3573709
Publisher: IEEE

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CFET Beyond 3 nm: SRAM Reliability Under Design-Time and Run-Time Variability

CFET Beyond 3 nm: SRAM Reliability Under Design-Time and Run-Time Variability 150 150
Author(s): Sufia Shahin, Swati Deshwal, Anirban Kar, Mahdi Benkhelifa, Yogesh S. Chauhan, Hussam Amrouch

Abstract:

This work investigates the reliability of complementary field-effect transistors (CFETs) by addressing both design-time variability arising from process variations and run-time variability due to temperature and aging effects. A rigorously calibrated TCAD model, validated against experimental CFET data, is employed to quantify the impact of metal gate granularity (MGG)-induced …

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 51 – 59
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3568622
Publisher: IEEE

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An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K

An Investigation of Minimum Supply Voltage of 5-nm SRAM From 300 K Down to 10 K 150 150
Author(s): Hafeez Raza, Shivendra Singh Parihar, Yogesh Singh Chauhan, Hussam Amrouch, Avinash Lahgere

Abstract:

In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum operating voltage ( $V_{\min }$ ) of 5-nm Fin Field-Effect Transistors (FinFETs)-based Static Random Access Memory (SRAM) cells. To perform the SRAM $V_{\min }$ evaluation, we have measured the FinFETs fabricated using a commercial 5…

Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Page(s): 42 – 50
Year of Publication: 2025
Electronic ISSN: 2329-9231
DOI: 10.1109/JXCDC.2025.3560215
Publisher: IEEE

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