IEEE Journal on Exploratory Solid-State Computational Devices and Circuits – Journals

LUT-Based Convolutional Tsetlin Machine Accelerator With Dynamic Clause Scaling for Resources-Constrained FPGAs

LUT-Based Convolutional Tsetlin Machine Accelerator With Dynamic Clause Scaling for Resources-Constrained FPGAs 150 150

Abstract:

The rapid growth of machine learning (ML) workloads, particularly in computer vision applications, has significantly increased computational and energy demands in modern electronic systems, motivating the use of hardware accelerators to offload processing from general-purpose processors. Despite advances in computationally efficient ML models, achieving energy-efficient inference on resource-constrained edge devices …

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Design and Analysis of a Three-Stream STT-MTJ TRNG With XOR and Majority Voter Logic as Postprocessing Architectures

Design and Analysis of a Three-Stream STT-MTJ TRNG With XOR and Majority Voter Logic as Postprocessing Architectures 150 150

Abstract:

True random number generators (TRNGs) are critical for hardware security, providing unpredictable entropy for cryptographic applications. Spin-transfer torque magnetic tunnel junction (STT-MTJ) devices offer a promising entropy source due to their low-power consumption, nonvolatility, and stochastic switching behavior. This work presents an MTJ-based TRNG that produces three independent bit streams. …

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Special Topic on Modeling and Simulation of Emerging Materials, Devices, and Circuits for Energy-Efficient Computing

Special Topic on Modeling and Simulation of Emerging Materials, Devices, and Circuits for Energy-Efficient Computing 150 150

Abstract:

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Characterization and Modeling of Multilevel Analog ReRAM Synapses in the Sky130 Process

Characterization and Modeling of Multilevel Analog ReRAM Synapses in the Sky130 Process 150 150

Abstract:

Nonvolatile memory devices play a key role in enabling energy-efficient computing. Among them, analog nonvolatile memories such as resistive random access memory (ReRAM) offer high density and low power compared to conventional digital memories. However, their analog nature introduces device-level variability that impacts computational accuracy. This work presents the characterization …

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Coupled Simulation Methodology for In-Memory Computing Systems

Coupled Simulation Methodology for In-Memory Computing Systems 150 150

Abstract:

Simulations for the development and optimization of future in-memory computing (IMC) systems often face the problem that the modeling of the large system is desired, but at the same time, the effects at the device level should also be taken into account. Such effects could be due to the material …

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Special Topic on Energy-Efficient In-/Near-Memory Computing With Emerging Devices

Special Topic on Energy-Efficient In-/Near-Memory Computing With Emerging Devices 150 150

Abstract:

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Special Topic on Challenges and Opportunities for Information Processing and Storage With Ferroelectric Devices and Circuits

Special Topic on Challenges and Opportunities for Information Processing and Storage With Ferroelectric Devices and Circuits 150 150

Abstract:

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Integrated Spatiotemporal Multiscale- Multiphysics-Uncertainty Simulation for Controlling Variability in RRAM Devices

Integrated Spatiotemporal Multiscale- Multiphysics-Uncertainty Simulation for Controlling Variability in RRAM Devices 150 150

Abstract:

Resistive random access memory (RRAM) is a leading candidate for next-generation nonvolatile memory and neuromorphic computing. However, its performance is limited by inherent switching variability and uncertainties in spatiotemporal multiscale materials and processes. This study integrates multiphysics and multiscale modeling with uncertainty quantification (UQ) to systematically address these limitations and …

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Energy-Efficient Logic-in-Memory and Neuromorphic Computing in Raised Source and Drain MOSFETs

Energy-Efficient Logic-in-Memory and Neuromorphic Computing in Raised Source and Drain MOSFETs 150 150

Abstract:

This work highlights the potential application of raised source and drain (RSD) MOSFETs-based charge trapping memory (CTM) for next-generation computing applications. This simulation study presents a double-gate (DG)-RSD MOSFET technology with a short gate length (50 nm) to significantly improve the performance of logic-in-memory (LIM) and neuromorphic computing (NC) systems. …

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