IEEE Journal of Solid-State Circuits

A Mixed-Signal SAT Solver for Exploring Nonideal Effects and Scalability in Analog Computation

A Mixed-Signal SAT Solver for Exploring Nonideal Effects and Scalability in Analog Computation 150 150

Abstract:

Recent years have seen growing interest in custom and nature-inspired computing methods for solving computationally challenging combinatorial optimization problems. The Boolean satisfiability (SAT), a canonical nondeterministic polynomial (NP)-complete problem, has remained a focal point due to its wide applicability in artificial intelligence, cryptography, and formal verification. This article presents …

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A Stress- and Temperature-Compensated TMR Current Sensor With ±0.13% Sensitivity Variation

A Stress- and Temperature-Compensated TMR Current Sensor With ±0.13% Sensitivity Variation 150 150

Abstract:

This article presents a high-precision tunnel magnetoresistance (TMR)-based non-contact current sensor with enhanced immunity to sensitivity drift. A background sensitivity stabilization loop (SSL) continuously regulates the TMR bias voltage to compensate intrinsic sensitivity variations. Through this closed-loop regulation, sensitivity drift of the TMR sensor induced by temperature, mechanical stress, …

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A 6–10.1-GHz Compact CMOS SOI Power Amplifier Using a 6:1 Dual-Mode-Optimized Interleaved Transformer for Portable Radar and ISAC Front Ends

A 6–10.1-GHz Compact CMOS SOI Power Amplifier Using a 6:1 Dual-Mode-Optimized Interleaved Transformer for Portable Radar and ISAC Front Ends 150 150

Abstract:

This article presents a power-dense and energy-efficient power amplifier (PA) for portable radar and integrated sensing and communication (ISAC) nodes, addressing the concurrent requirements of high output power and stringent spectral compliance, all within tight thermal and silicon-area budgets. A 6:1 dual-mode-optimized interleaved transformer (DMO-IT) is introduced to co-integrate efficient six-way …

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A −102.2-dB THD+N 92% Efficiency 1.08-mW Idle Power Digital-Input Class-D Amplifier With Power-Adaptive Techniques and Dual-Edge Pulse Width Adjustment Modulation

A −102.2-dB THD+N 92% Efficiency 1.08-mW Idle Power Digital-Input Class-D Amplifier With Power-Adaptive Techniques and Dual-Edge Pulse Width Adjustment Modulation 150 150

Abstract:

Portable audio devices, such as true wireless stereo (TWS) headphones and hearing aids, increasingly rely on digital-input amplifiers to deliver high-quality sound while consuming minimal power. This article presents a digital-input, filter-less Class-D amplifier (CDA) that achieves low noise, low total harmonic distortion plus noise (THD+N), and low idle …

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A 13.56-MHz Wireless Power and Synchronized Full-Duplex Data Transceiver IC Using a Single Inductive Link for Wearable Biomedical Applications

A 13.56-MHz Wireless Power and Synchronized Full-Duplex Data Transceiver IC Using a Single Inductive Link for Wearable Biomedical Applications 150 150

Abstract:

This article proposes a 13.56-MHz wireless power and synchronized full-duplex data transceiver (WPSFDT) IC using a single inductive link for compact wearable and biomedical systems. Conventional full-duplex (FD) data telemetry systems are limited by their use of additional antennas or external LC networks to create data channels in separate frequency …

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A Line-Connected Q-Sampler-Based Multi-Phase Hybrid Converter

A Line-Connected Q-Sampler-Based Multi-Phase Hybrid Converter 150 150

Abstract:

This article presents a line-connected Q-sampler-based (LQS) multi-phase (MP) hybrid converter for direct conversion from high-rail to point-of-load (PoL). The proposed topology uses an input-parallel switched-capacitor (SC) structure to support “ALL-ON” operation during load transients, while a “multi-source- ${V}_{\mathrm { X}}$ ” control decouples voltage conversion ratio (VCR) from phase count, …

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APM-CIM: An Array Partition Multi-Macro CIM System With Dynamic Sparse Approximation for Neural Network Edge Applications

APM-CIM: An Array Partition Multi-Macro CIM System With Dynamic Sparse Approximation for Neural Network Edge Applications 150 150

Abstract:

Computing-in-memory (CIM) has been widely investigated as a solution to the von Neumann bottleneck to reduce data transfer between memory and processor. However, existing CIM macros for neural network (NN) edge applications still suffer from high latency and energy consumption due to the correlation between data precision and the number …

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THz-TSI: A Terahertz Wireless Through-Silicon Interconnect Module for Advanced 3-D Integration Applications

THz-TSI: A Terahertz Wireless Through-Silicon Interconnect Module for Advanced 3-D Integration Applications 150 150

Abstract:

By vertically stacking device layers, advanced 3-D integration overcomes traditional planar scaling limits, delivering the bandwidth and power efficiency essential for modern artificial intelligence (AI) and high-performance computing (HPC) integrated systems. However, continued scaling of conventional through-silicon vias (TSVs) and microbumps presents critical bottlenecks due to inherent thermo-mechanical stress, complex …

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A 300-μW BLE-Compliant Packet-Based Data-Agnostic Clock-Harvesting RX Achieving −85/−70 dBm Sensitivity for ±40/±15 ppm Accuracy

A 300-μW BLE-Compliant Packet-Based Data-Agnostic Clock-Harvesting RX Achieving −85/−70 dBm Sensitivity for ±40/±15 ppm Accuracy 150 150

Abstract:

An ultralow-power Bluetooth low energy (BLE)-compliant crystal-less clock-harvesting receiver is presented that uses the BLE advertising packets (APs) to calibrate an on-chip frequency reference with ±400 ppm initial frequency offset. The proposed front-end, fabricated in 22 nm FDSOI, is capable of pushing the frequency accuracy of the reference further to below ±40/±15 …

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