IEEE Journal of Solid-State Circuits

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An Efficient Power Management Unit With Continuous MPPT and Energy Recycling for Wireless Millimetric Biomedical Implants

An Efficient Power Management Unit With Continuous MPPT and Energy Recycling for Wireless Millimetric Biomedical Implants 150 150
Author(s): Yiwei Zou, Huan-Cheng Liao, Wei Wang, Wonjune Kim, Yumin Su, Jacob T. Robinson, Kaiyuan Yang

Abstract:

Biomedical implants offer transformative tools to improve medical outcomes. To realize minimally invasive implants with miniaturized volume and weight, wireless power transfer (WPT) has been extensively studied to replace bulky batteries that dominate the volume of traditional implants and require surgical replacements. Ultrasonic (US) and magnetoelectric (ME) WPT modalities, which …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3617217
Publisher: IEEE

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AFP-CIM: All-Inclusive Floating-Point With Segmented Compute-in-Memory Macro

AFP-CIM: All-Inclusive Floating-Point With Segmented Compute-in-Memory Macro 150 150
Author(s): Yi Zhan, Wei-Han Yu, Ka-Fai Un, Zongsheng Li, Haoming Chu, Yuxiang Huan, Ning Ma, Li-Rong Zheng, Rui P. Martins, Pui-In Mak

Abstract:

This article reports an all-inclusive floating-point (AFP) with the segmented 8T-static random access memory (SRAM) compute-in-memory (CIM) macro. It features: 1) a segmented read-wordline (SRWL) to efficiently support the AFP formats including the AFP4/6/8/16 with all of the exponent–mantissa ratios (EMRs); 2) a bit-wise accumulation first (BWAF) circuit structure with a …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3625995
Publisher: IEEE

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A Hybrid SCVR With 4 × C F Continuously Scalable-Conversion Ratio SC Stage

A Hybrid SCVR With 4 × C F Continuously Scalable-Conversion Ratio SC Stage 150 150
Author(s): Yuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Fuyao Zhang, Yihan Zhang, Rui P. Martins, Mo Huang

Abstract:

This work presents a hybrid switched-capacitor (SC) voltage regulator (VR) with a continuously scalable-conversion (CSC)-ratio stage implemented with off-chip flying capacitors ( $boldsymbol {C}_{ F}$ s). By eliminating the need for high-density on-chip capacitors, this approach offers broader accessibility to designers. The use of off-chip $boldsymbol {C}_{ F}$ s mandates …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3626285
Publisher: IEEE

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A Real-Time Deep Reinforcement Learning Processor for Mapless Autonomous Navigation With Unified Actor-Critic Network and Inference-on-Request Scheduling

A Real-Time Deep Reinforcement Learning Processor for Mapless Autonomous Navigation With Unified Actor-Critic Network and Inference-on-Request Scheduling 150 150
Author(s): Juyoung Oh, Jie-Xin Liu, Yi-Chen Teng, Hsueh-Cheng Wang, Dongsuk Jeon

Abstract:

This article presents a real-time deep reinforcement learning (DRL) processor for mapless autonomous navigation targeting resource- and energy-constrained mobile robots. The unified actor-critic network architecture combined with feature map caching enables parameter sharing and eliminates redundant computations. This approach reduces the total parameter count, external memory access (EMA), and overall …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 16
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3627785
Publisher: IEEE

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A 3 × 3 Multi-Chip Ka-Band Phased Array With 2-D-Scalable LO Distribution and Phase Self-Alignment

A 3 × 3 Multi-Chip Ka-Band Phased Array With 2-D-Scalable LO Distribution and Phase Self-Alignment 150 150
Author(s): Alireza Rouhafza, Ruixing He, Yahya Tousi

Abstract:

This work presents a scalable LO distribution and beam steering aperture based on nearest-neighbor mm-wave phase detection and self-alignment. We develop the theory of operation of the multi-loop phase alignment scheme and simulate the effect of practical variations on the performance of the architecture. The proposed technique uses high-speed chip-to-chip …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 13
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3625370
Publisher: IEEE

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A Segment-Interlace Multi-Phase Hybrid Converter With Concurrent Inductor Energizing and Inherent Current Balancing

A Segment-Interlace Multi-Phase Hybrid Converter With Concurrent Inductor Energizing and Inherent Current Balancing 150 150
Author(s): Jiacheng Yang, Zihao Tang, Xin Ming, Rui P. Martins, Mo Huang

Abstract:

This article presents a segment-interlace (SI) multiple-phase (MP) hybrid converter for 12-V bus to point-of-load (PoL) conversion. This topology achieves key features that are typically difficult to realize together in conventional MP hybrid converters: 1) concurrent charging of all inductors; 2) wide voltage conversion ratio (VCR) range; and 3) inherent auto-balancing of inductor …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 12
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3626421
Publisher: IEEE

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Design of G-Band Watt-Level GaN Power Amplifier With Multiband Large-Signal Impedance Correction and Circuit-Package Co-Design Technique

Design of G-Band Watt-Level GaN Power Amplifier With Multiband Large-Signal Impedance Correction and Circuit-Package Co-Design Technique 150 150
Author(s): Weibo Wang, Zhe Li, Kai Li, Haifeng Cheng, Fangjin Guo, Yibin Zhang, Keping Wang

Abstract:

This article presents a gallium nitride (GaN) solid-state power amplifier (SSPA) operating in the G band and delivering watt-level output power. To enhance the performance of the $2{times }20~{mu }$ m GaN high electron mobility transistors (GaN HEMTs), AlN/GaN heterojunction, n+ GaN regrown, and 50-nm floating T-gate are employed with …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 17
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3626661
Publisher: IEEE

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A 22.4–25.6-GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage Level and Balanced 2nd Harmonic Extraction

A 22.4–25.6-GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage Level and Balanced 2nd Harmonic Extraction 150 150
Author(s): Yunbo Huang, Zunsong Yang, Hongyu Ren, Rui P. Martins, Yan Lu, Nan Sun, Nan Qi, Bo Li, Yong Chen

Abstract:

This article presents a millimeter-wave (mm-wave) low-jitter and low-spur ping-pong sub-sampling PLL (PP-SS-PLL) with unified supply voltage and balanced 2nd harmonic extraction. It incorporates a PP-SS phase detector (PP-SS-PD) to mitigate the tradeoff between the in-band phase noise (PN) and loop bandwidth. We utilize an SS delay-locked loop (SS-DLL) to …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1 – 14
Year of Publication: 2025
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3621088
Publisher: IEEE

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kNOT: A 2-D Distributed Network-on-Textile Architecture With Direct Die-to-Yarn Integration of 0.6 × 2.15 mm2 SoC and bySPI Chiplets for Wearable Computing

kNOT: A 2-D Distributed Network-on-Textile Architecture With Direct Die-to-Yarn Integration of 0.6 × 2.15 mm2 SoC and bySPI Chiplets for Wearable Computing 150 150
Author(s): Anjali Agrawal, Zhenghong Chen, Braden E. Desman, Jinhua Wang, Akiyoshi Tanaka, Fahim Foysal, Charles D. Hess, Will Farrell, Jim Owens, Daniel S. Truesdell, Benton H. Calhoun

Abstract:

This article presents kNOT, a scalable, distributed, and 2-D Network-On-Textile (kNOT) comprising miniaturized systems on chip (SoCs) and bypass SPI (bySPI) networking chiplets that together enable diverse networking and computational tasks. To preserve garment comfort and flexibility, kNOT eliminates bulky boards and interposers through direct-die attachment to embroidered yarns. The …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 103 – 115
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3624099
Publisher: IEEE

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