IEEE Journal of Solid-State Circuits

AACIM: A 2785-TOPS/W, 161-TOP/mm2, <1.17%-RMSE, Analog-In Analog-Out Computing-In-Memory Macro in 28 nm

AACIM: A 2785-TOPS/W, 161-TOP/mm2, <1.17%-RMSE, Analog-In Analog-Out Computing-In-Memory Macro in 28 nm 150 150

Abstract:

This article presents an analog-in analog-out CIM macro (AACIM) for use in analog deep neural network (DNN) processors. Our macro receives analog inputs, performs a 64-by-32 vector–matrix multiplication (VMM) with a current-discharging computation mechanism, and produces analog outputs. It stores a 4-bit weight as an analog voltage in the …

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A 14-b Energy-Efficient BW/Power Scalable CTDSM With a Frequency-Controlled Current Source

A 14-b Energy-Efficient BW/Power Scalable CTDSM With a Frequency-Controlled Current Source 150 150

Abstract:

This work presents a 14-bit energy-efficient bandwidth (BW)/power scalable continuous-time delta–sigma modulator (CTDSM) for sensor interfaces in IoT applications. To ensure low noise for small input signals and achieve BW/power scalability, it is built around Gm-C integrators biased via a linear frequency-controlled current source (FCCS). The FCCS …

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A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd-Temperature Sensor for SoC Thermal Management

A Compact, Highly-Digital Sensor-Fusion-Based Joint V dd-Temperature Sensor for SoC Thermal Management 150 150

Abstract:

This article presents a fine-grained thermal sensing network for thermal management in SoCs. Sensor nodes in this network are made up of joint supply voltage ( $V_{\mathrm {dd}}$ ) and temperature ( $T$ ) sensors, which are compact and highly digital. Measurements from these simple but imperfect sensors are jointly processed to extract …

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A 0.4-V 32-kHz Pulse-Injection Temperature-Compensated Crystal Oscillator With Sub-Cycle CL Modulation and DLL-Reused Temperature Sensor

A 0.4-V 32-kHz Pulse-Injection Temperature-Compensated Crystal Oscillator With Sub-Cycle CL Modulation and DLL-Reused Temperature Sensor 150 150

Abstract:

This article presents a 0.4-V 32 kHz pulse-injection (PI) temperature-compensated crystal oscillator (TCXO) that incorporates subcycle capacitive load ( $C_{\text {L}}$ ) modulation for frequency compensation. The proposed TCXO compensates for the crystal’s frequency deviation ( $\Delta f$ ) by dynamically adjusting the enabling duration of the additional $C_{\text {L}}$ within each …

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Frequency-Agile Self-Interference Cancellation in a Wideband Compact Full-Duplex Receiver Using Cascaded Low-Noise and High-Delay-Bandwidth-Product APFs

Frequency-Agile Self-Interference Cancellation in a Wideband Compact Full-Duplex Receiver Using Cascaded Low-Noise and High-Delay-Bandwidth-Product APFs 150 150

Abstract:

Wideband self-interference cancellation (SIC) in a full-duplex (FD) system requires the cancellers to achieve flat nanosecond-scale RF delay while minimizing the noise penalty to the receiver (RX). This work proposes: 1) cascadable hybrid low-noise first-order all-pass filters (APFs) in the first tap of the RF canceller to reduce the noise figure (…

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Space-Mate: A 303.5-mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing

Space-Mate: A 303.5-mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing 150 150

Abstract:

Simultaneous localization and mapping (SLAM) provides crucial ego-pose information and 3-D maps of the user environment, which are fundamental to emerging mobile spatial computing devices. Dense 3-D mapping and accurate pose estimation are particularly necessary for applications like augmented reality (AR) and autonomous navigation. However, existing SLAM processors are typically …

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A Standardized 20-Tb/s Bandwidth Scalable Heterogeneous 2.5-D System Supporting Assembly Time Workload-Dependent Chiplet Configurations

A Standardized 20-Tb/s Bandwidth Scalable Heterogeneous 2.5-D System Supporting Assembly Time Workload-Dependent Chiplet Configurations 150 150

Abstract:

The increasing adoption of chiplet-based architectures highlights the compelling paradigm of disaggregating monolithic systems into interconnected chiplets, offering numerous advantages for heterogeneous integration. This disaggregation is essential as chips approach the reticle limit, improving yield and design flexibility by combining diverse functionalities. Next-generation 2.5-D systems require enhanced interoperability across heterogeneous …

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A Stochastic Analog Boolean Satisfiability Solver

A Stochastic Analog Boolean Satisfiability Solver 150 150

Abstract:

This article presents a stochastic analog Boolean satisfiability (SAT) solver, featuring a fast open-loop architecture with continuous-time (CT) self-loopback pull-up switches, a discrete-time (DT) scrambling scheme, and a cost-efficient hybrid random code generator. The SAT prototype demonstrates 100% solvability and 3.5- $\mu $ s solution time with 8.6-nJ energy consumption for 1000 hard …

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A “No Gain” Direct-Conversion IQ RF-to-Bits Receiver Without Active Linear Amplification

A “No Gain” Direct-Conversion IQ RF-to-Bits Receiver Without Active Linear Amplification 150 150

Abstract:

This work describes a direct-conversion IQ receiver (RX) that does not utilize any active linear (power) amplification, covering its design considerations, prototype implementation, and measurement verification. Only RLC components, MOS transistor (MOST) switches, and comparators are used, leading to several unique design challenges. Key among these are the fact that …

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