IEEE Journal of Solid-State Circuits – Journals

Guest Editorial Introduction to the Special Section on the 2023 RFIC Symposium

Guest Editorial Introduction to the Special Section on the 2023 RFIC Symposium 150 150

Abstract:

This special section of the IEEE Journal of Solid-State Circuits presents the expanded versions of selected articles presented at the 2023 Radio Frequency Integrated Circuits Symposium (RFIC) held in San Diego, CA, USA, during June 11–13, 2023. The RFIC Symposium is the world’s premier conference focused on RF and millimeter-wave (mmWave) integrated …

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New Associate Editor

New Associate Editor 150 150

Abstract:

It is with great pleasure that I welcome Prof. Q. Jane Gu to the Editorial Board of the IEEE Journal Of Solid-State Circuits as a new Associate Editor. Prof. Gu is an expert in high-speed integrated circuits and systems, particularly mm-wave, sub-mm-wave, and THz circuits.

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Corrections to “A Synchronized Switch Harvesting Rectifier With Reusable Storage Capacitors for Piezoelectric Energy Harvesting”

Corrections to “A Synchronized Switch Harvesting Rectifier With Reusable Storage Capacitors for Piezoelectric Energy Harvesting” 150 150

Abstract:

In the above article [1], page 2605, the changes in Table II are as follows.

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Introduction to the Special Issue on the 2023 Symposium on VLSI Circuits

Introduction to the Special Issue on the 2023 Symposium on VLSI Circuits 150 150

Abstract:

This Special Issue of IEEE Journal of Solid-State Circuits highlights some of the outstanding circuit papers presented at the Symposium on VLSI Technology and Circuits. The Symposium was held in person, June 11–16, 2023, in Kyoto, Japan.

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Guest Editorial 2023 Custom Integrated Circuits Conference

Guest Editorial 2023 Custom Integrated Circuits Conference 150 150

Abstract:

This Special Issue of the IEEE Journal of Solid-State Circuits (JSSC) features expanded versions of key articles presented at the 2023 Custom Integrated Circuits Conference (CICC), which was an in-person event held in San Antonio, TX, USA, from April 23 to 26, 2023. As the world’s premier conference devoted to integrated circuit (IC) …

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A Cryo-CMOS DAC-Based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing

A Cryo-CMOS DAC-Based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing 150 150

Abstract:

Addressing the advancement toward large-scale quantum computers, this article presents the first four-level pulse amplitude modulation (PAM4) wireline transmitter (TX) operating at cryogenic temperatures (CTs). With quantum computers scaling up toward thousands of quantum bits (qubits), but having too limited fidelity for robust operation, continuous rounds of quantum error correction (…

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Concurrent Body-Coupled Powering and Communication ICs With a Single Electrode

Concurrent Body-Coupled Powering and Communication ICs With a Single Electrode 150 150

Abstract:

Body-coupled powering (BCP) and body-coupled communication (BCC) utilize the human body channel as the wireless transmission medium, which shows less path loss around the body area. However, integrating both BCP and BCC requires multiple electrodes or alternating the uplink and downlink in the time domain, due to signal interferences and …

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A 1.8–65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators

A 1.8–65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators 150 150

Abstract:

This work presents a power-efficient level crossing (LC) ADC designed to digitize sparse signals. It uses dynamically self-biased comparators, which require minimal current when the input voltage is far from a decision threshold. It also uses a DAC architecture which avoids the signal attenuation commonly present in prior LC ADC …

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A 3-nm FinFET 27.6-Mbit/mm2 Single-Port 6T SRAM Enabling 0.48–1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking

A 3-nm FinFET 27.6-Mbit/mm2 Single-Port 6T SRAM Enabling 0.48–1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking 150 150

Abstract:

A 3-nm FinFET single-port (SP) 6T SRAM macro is proposed that utilizes a far-end pre-charge (FPC) circuit and weak-bit (WB) tracking circuit. These circuits can decrease write cycle time by decreasing the pre-charge period and engaging read cycle time by enhancing the trackability of sense enable timing over supply voltage. …

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