IEEE Journal of Solid-State Circuits – Journals

Errata to “A 19-dBm 110–142-GHz CMOS Power Amplifier With Device-Centric Power Boosting and Dual-Coupled Slotline Combiner”

Errata to “A 19-dBm 110–142-GHz CMOS Power Amplifier With Device-Centric Power Boosting and Dual-Coupled Slotline Combiner” 150 150

Abstract:

In the above article [1], which is an expanded version of [2], the authors would like to clarify that a drain supply voltage of $V_{DD} ~=2.6$ V was applied to all three stages during the measurements. In addition, measurements performed on multiple chip samples, wire-bonded on different PCB boards, indicate that in …

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A 0.0035-mm2 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping

A 0.0035-mm2 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping 150 150

Abstract:

This work presents a compact second-order noise shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC) featuring a novel kT/C noise shaping technique. The proposed kT/C noise shaping technique selectively suppresses kT/C noise within the signal bandwidth of an oversampled SAR ADC. It avoids using a wideband noise …

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TexCAC: A Direct-Textile-Attachable Microcontroller Integrating 2-MB MRAM for the Command and Control of Advanced Smart Textiles

TexCAC: A Direct-Textile-Attachable Microcontroller Integrating 2-MB MRAM for the Command and Control of Advanced Smart Textiles 150 150

Abstract:

Advanced smart textiles (ASTs) are textile-integrated electronic systems that enable many applications, including healthcare, robotics, and IoT. ASTs contain a variety of electronic components to enable whole system functionality (batteries, sensors, SoCs, etc.), which all require orchestration from a central command-and-control (CAC) module. The primary functions of the CAC module …

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A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm2

A 28-nm FD-SOI CMOS Analog-IMC Core Based on PCM Featuring 8 512 × 512-Weight Layers and 28M Weights×TOPs/W/mm2 150 150

Abstract:

In-memory computing (IMC) hardware accelerators for deep neural networks (DNNs) require storing a massive number of coefficients within a single computing macro to avoid performance degradation in multicore clusters. This aspect, often overlooked by common figures of merit (FoMs), can be effectively addressed by phase-change memory (PCM) technology, thanks to …

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Guest Editorial Introduction to the Special Section on the 2025 European Solid-State Electronics Research Conference

Guest Editorial Introduction to the Special Section on the 2025 European Solid-State Electronics Research Conference 150 150

Abstract:

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New Associate Editor

New Associate Editor 150 150

Abstract:

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A 92.1-dB SNDR Easy-Driving Two-Step NS-SAR-Based Incremental ADC With Concurrent Gain-Error Plus Noise Suppression

A 92.1-dB SNDR Easy-Driving Two-Step NS-SAR-Based Incremental ADC With Concurrent Gain-Error Plus Noise Suppression 150 150

Abstract:

This article presents a two-step incremental analog-to-digital converter (ADC) that achieves high resolution and energy efficiency while substantially easing the input driving constraints and interstage gain variation. By employing a level-shifted sub-ranging architecture with an input-tracking (IT) feature, the design obviates direct input sampling, thereby significantly relaxing the demands on …

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A Fast-Settling mm-Wave LO With I/Q-Calibrated SSB Mixer and Frequency-Tuned ILO Filter Achieving Sub-ns Settling Time and −56 dBc Spur

A Fast-Settling mm-Wave LO With I/Q-Calibrated SSB Mixer and Frequency-Tuned ILO Filter Achieving Sub-ns Settling Time and −56 dBc Spur 150 150

Abstract:

This article presents a fast-settling 60-GHz local oscillator (LO) for stepped-carrier orthogonal frequency-division multiplexing (OFDM), employing an I/Q-calibrated single-sideband (SSB) mixer with a frequency-tuned injection-locked oscillator (ILO) filter. The SSB mixer enables instantaneous frequency hopping, while the ILO acts as a high- $Q$ bandpass filter that suppresses mixer-induced spurs. …

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BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of −247.9 dB at 3 GHz With a Ring Oscillator

BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of −247.9 dB at 3 GHz With a Ring Oscillator 150 150

Abstract:

This work presents a bandwidth augmented sub-sampling phase-locked loop (BASS-PLL) architecture that features simultaneous out-of-band noise suppression by direct and multipath sampling of the ring oscillator’s (ROs) output and in-band noise suppression via an intrinsic sub-sampling mechanism, ultimately combining the benefits of over-sampling PLLs (OS-PLLs) and sub-sampling PLLs (SS-PLLs) …

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