IEEE Journal of Solid-State Circuits – Journals

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Guest Editorial Introduction to the Special Section on the 2025 Symposium on VLSI Circuits

Guest Editorial Introduction to the Special Section on the 2025 Symposium on VLSI Circuits 150 150
Author(s): Sugako Otani, John Wuu

Abstract:

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Published in: IEEE Journal of Solid-State Circuits
Page(s): 1272 – 1274
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3669685
Publisher: IEEE

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New Associate Editor

New Associate Editor 150 150
Author(s): Boris Murmann

Abstract:

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Published in: IEEE Journal of Solid-State Circuits
Page(s): 1271 – 1271
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3667077
Publisher: IEEE

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A 40-GS/s 8-bit Time-Interleaved ADC Featuring SFDR-Enhanced Sampling and Power-Efficient Time-Domain Quantization in 28-nm CMOS

A 40-GS/s 8-bit Time-Interleaved ADC Featuring SFDR-Enhanced Sampling and Power-Efficient Time-Domain Quantization in 28-nm CMOS 150 150
Author(s): Chenghao Zhang, Maliang Liu, Yuan Chang, Yihang Yang, Jinhai Xiao, Yintang Yang, Yong Chen

Abstract:

This article reports a 40-GS/s 8-bit time-interleaved (TI) time-domain (TD) gated-ring-oscillator analog-to-digital converter (GRO-ADC). An interleaving number of 32 is achieved with a single-channel 8-bit GRO-ADC operating at 1.25 GS/s, leading to a low front-end design complexity compared to recently published arts. The sampling front end employs a linearity-enhanced boosted …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1907 – 1920
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3671459
Publisher: IEEE

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A Wideband Digitally Assisted Frequency Tripler With Adaptively Optimized Output Power in 55-nm SiGe BiCMOS

A Wideband Digitally Assisted Frequency Tripler With Adaptively Optimized Output Power in 55-nm SiGe BiCMOS 150 150
Author(s): Daniele Lodi Rizzini, Francesco Tesolin, Michele Rossoni, Riccardo Moleri, Filippo Osio, Andrea Mazzanti, Andrea L. Lacaita, Simone M. Dartizio, Salvatore Levantino

Abstract:

This article presents a 28–38-GHz frequency tripler implemented in 55-nm SiGe BiCMOS technology with a novel on-chip background calibration technique. This technique continuously optimizes the circuit performance by maximizing output power and improving fundamental harmonic rejection. The proposed tripler achieves wideband operation and robust performance across varying operating conditions and …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1844 – 1859
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3666591
Publisher: IEEE

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Adelia: A 4-nm LLM Processing Unit With Streamlined Dataflow and Dual-Mode Parallelism for Maximizing Hardware Efficiency

Adelia: A 4-nm LLM Processing Unit With Streamlined Dataflow and Dual-Mode Parallelism for Maximizing Hardware Efficiency 150 150
Author(s): Sukbin Lim, Jung-Hoon Kim, Seungjae Moon, Junseo Cha, Dongjin Seo, Jongho Kim, Hunjong Lee, Jinwon Lee, Joo-Young Kim

Abstract:

The proliferation of large language models (LLMs) as cross-domain foundation models is fueled by aggressive scaling in both parameter counts and inference-time computation. The emergence of sophisticated reasoning models further accelerates this trend, demanding longer context windows and escalating the computational and memory burdens of inference. A fundamental challenge arises …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1513 – 1525
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3663603
Publisher: IEEE

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A 142–164-GHz Phased-Array AiP Module With High-Power-Density and High-Efficiency Transceiver in 65-nm CMOS for 6G UE

A 142–164-GHz Phased-Array AiP Module With High-Power-Density and High-Efficiency Transceiver in 65-nm CMOS for 6G UE 150 150
Author(s): Yudai Yamazaki, Yohei Morishita, Sunghwan Park, Takaya Uchino, Chenxin Liu, Jun Sakamaki, Akihiro Egami, Ryosuke Hasaba, Ken Takahashi, Tomoki Abe, Tomohiro Murata, Yoichi Nakagawa, Takashi Tomura, Hiroshi Taneda, Kei Murayama, Makoto Tsukahara, Hiroko Ota, Yoko Nakabayashi, Ryuji Kinugawa, Takumi Kojima, Anyi Tian, Kotaro Ito, Chun Wang, Hans Herdian, Yi Zhang, Zheng Li, Wenqian Wang, Hongye Huang, Dingxin Xu, Sena Kato, Michihiro Ide, Shinsuke Hara, Issei Watanabe, Akifumi Kasamatsu, Yuncheng Zhang, Hiroyuki Sakai, Kazuaki Kunihiro, Atsushi Shirane, Koji Takinami, Kenichi Okada

Abstract:

This work presents a D-band high-power-density four-element phased-array transceiver for 6G user equipment (UE). Conventional designs require large multi-stage LO generation circuits for D-band up/down conversion, making it difficult to achieve compact size and low-power consumption. To address this, we propose an integrated LO chain using an injection-locked tripling …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1275 – 1293
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3665184
Publisher: IEEE

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A 1.16 e-rms Temporal Random Noise, 123-dB High Dynamic Range, 2.988-μm Pitch 3-Mpixel Three-Stacked Digital Pixel Sensor for Versatile Applications

A 1.16 e-rms Temporal Random Noise, 123-dB High Dynamic Range, 2.988-μm Pitch 3-Mpixel Three-Stacked Digital Pixel Sensor for Versatile Applications 150 150
Author(s): Min-Woong Seo, Yong-Suk Choi, Sanggwon Lee, Yeongseok Shim, Gihwan Cho, Daehee Bae, Masamichi Ito, Jaehun Jeong, Hiroyuki Sugihara, Si-Gyoung Koo, Sung-Jae Byun, Hyukbin Kwon, Youna Lee, Bumjun Kim, Su-Hyun Han, Suksan Kim, Wonoh Ryu, Kwan-Sik Kim, Yongjun Kim, Seung-Sik Kim, Junghoon Jung, Sun-Young Yoo, Jinkyeong Heo, Seung-Chul Shin, Heesung Shim, Jae-Kyu Lee, Jonghyun Go, Jaihyuk Song

Abstract:

This article presents a 3-Mpixel (Mp) three-stacked digital pixel sensor (DPS) featuring the world’s smallest pixel pitch of $2.988~\mu $ m, achieving a low temporal random noise (RN) of 1.16 e-rms and a high dynamic range (HDR) of 123 dB in global-shutter (GS) operation mode for versatile applications. To realize both the …

Published in: IEEE Journal of Solid-State Circuits
Page(s): 1319 – 1332
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2026.3663214
Publisher: IEEE

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Editorial New Associate Editors

Editorial New Associate Editors 150 150
Author(s): Boris Murmann

Abstract:

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Published in: IEEE Journal of Solid-State Circuits
Page(s): 811 – 811
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3650065
Publisher: IEEE

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Guest Editorial Introduction to the Special Section on the 2025 Custom Integrated Circuits Conference (CICC)

Guest Editorial Introduction to the Special Section on the 2025 Custom Integrated Circuits Conference (CICC) 150 150
Author(s): Taiyun Chi, Yoonmyung Lee, Inhee Lee

Abstract:

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Published in: IEEE Journal of Solid-State Circuits
Page(s): 812 – 815
Year of Publication: 2026
Electronic ISSN: 1558-173X
DOI: 10.1109/JSSC.2025.3650431
Publisher: IEEE

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