Boris Murmann, Chair, TC-OSE
Boris Murmann is a Professor of Electrical Engineering at Stanford University. He joined Stanford in 2004 after completing his Ph.D. degree in electrical engineering at the University of California, Berkeley in 2003. From 1994 to 1997, he was with Neutron Microelectronics, Germany, where he developed low-power and smart-power ASICs in automotive CMOS technology. Since 2004, he has worked as a consultant with numerous Silicon Valley companies. Dr. Murmann’s research interests are in mixed-signal integrated circuit design, with special emphasis on sensor interfaces, data converters and custom circuits for embedded machine learning. In 2008, he was a co-recipient of the Best Student Paper Award at the VLSI Circuits Symposium and a recipient of the Best Invited Paper Award at the IEEE Custom Integrated Circuits Conference (CICC). He received the Agilent Early Career Professor Award in 2009 and the Friedrich Wilhelm Bessel Research Award in 2012. He has served as an Associate Editor of the IEEE Journal of Solid-State Circuits, an AdCom member and Distinguished Lecturer of the IEEE Solid-State Circuits Society, as well as the Data Converter Subcommittee Chair and the Technical Program Chair of the IEEE International Solid-State Circuits Conference (ISSCC). He is the founding faculty co-director of the Stanford SystemX Alliance and the faculty director of Stanford's System Prototyping Facility (SPF). He is a Fellow of the IEEE.
Priyanka Raina: Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University. She received her BTech in Electrical Engineering from the IIT Delhi in 2011 and her SM and PhD in Electrical Engineering and Computer Science from MIT in 2013 and 2018. Priyanka’s research is on creating high-performance and energy-efficient architectures for domain-specific hardware accelerators in existing and emerging technologies and agile hardware-software co-design. Her research has won best paper awards at VLSI, ESSCIRC and MICRO conferences and in the JSSC journal. Priyanka teaches several VLSI design classes at Stanford. She has also won the Intel Rising Star Faculty Award, Hellman Faculty Scholar Award and is a Terman Faculty Fellow.
Research Interests: Domain-Specific Architectures, Hardware/Software Co-design, Design Productivity, Machine Learning, Near-Memory Computing
For a complete list of ongoing and past projects please see her publications and research group website.
Ali Sabir: Ali Sabir received his BS degree in Electronics Engineering from University of Engineering and Technology, Pakistan in 2021 with highest distinction. Currently, he is pursuing his Master's degree in Electrical Engineering (Specialization in Chip Design) from FAST-NUCES, Pakistan.
In 2021, he joined the ICD Lab at FAST-NUCES, Pakistan as an IC Design Engineer. He took part in the 2022 SSCS “PICO” Open-Source Chipathon where three of his projects were selected for tapeout. He also led the top-level integration team in one of the chips. He is also a member of TC-OSE Committee for 2023 SSCS “PICO” Open-Source Chipathon, his interest in the Digital and Mixed Signal IC Design.
Sadayuki Yoshitomi: Sadayuki Yoshitomi, Ph.D (IEEE member), joined TOSHIBA Research and Development Center, Kawasaki Kanagawa pref. Japan in 1993, where he is engaged in characterization and modeling of SiGe BiCMOS devices for RF applications. In 1999, he moved to the RF LSI design team of System LSI Division of TOSHIBA Corp, where he worked with the system design for GSM, Bluetooth applications. Since 2015, he is managing PDK development team for RF-CMOS application. He contributed PDK developments from 130nm to 40nm RF-CMOS as both manager and SPICE model engineer. From 2017 to 2022, he belonged to the memory division of TOSHIBA Corporation (currently named as KIOXIA corporation) as a chief specialist with the same role, where he contributed to the PDK developments of 3D Nand-Flash memory (BiCS) products. In 2022, he moved the ASIC design team of MegaChips corporation, Tokyo Japan, working with the highspeed ASIC design and next 5G system design. Dr.Sadayuki Yoshitomi is a subcommittee chair of BCICTS conference, TPC member of ESSDERC (EU), Mixdes (Poland) and IrPhe(Armenia) conferences, and working member of 79GHz license strategy working group of Japanese Interior Ministry.
Kwantae Kim: Kwantae Kim received the B.S., M.S., and Ph.D. degrees from the School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 2015, 2017, and 2021, respectively. From 2015 to 2017, he was with the Healthrian R&D Center, Daejeon, where he designed bio-potential readout IC for mobile healthcare solutions. In 2020, he was a Visiting Student with the Institute of Neuroinformatics, University of Zürich and ETH Zürich, Zürich, Switzerland, where he has been a Post-Doctoral Researcher since 2021. His research interests include analog/mixed-signal ICs for time-domain processing, in-memory computing, bio-impedance sensor, and neuromorphic audio sensor.
Mirjana Videnovic-Misic: Mirjana Videnovic-Misic graduated from Faculty of Technical Sciences (FTN), University of Novi Sad, Serbia in 2009 where she founded the Team for analog and radio-frequency IC design (ICreate) the same year. She joined as assistant professor in 2010 and introduced analog/RF courses at FTS. From 2014-2015 Dr. Videnovic-Misic was Fulbright Visiting Scholar at UC Berkeley and from 2015-2018 she was Marie Currie Individual Global Fellowship recipient in collaboration with UC Berkeley and ST Microelectronics working on antenna tuning system and small-cells RX design. From 2018-2022 Mirjana was with Silicon Austria Labs and technical lead for AnaGen project (Analog Generator). From October 2022 Dr Videnovic-Misic is with Infineon as the Implementation technical lead for AnaGen project. She is interested in RF IC design and analog/MS IC design automation. Dr Videnovic-Misic is big proponent of an open-source as a way to bring IC design closer to young people and bring new skills into the IC domain.
Francisco Brito: Francisco Brito Filho is a Professor of Electrical Engineering at Federal University of Semiarid Region – UFERSA, in Brazil. He is Ph.D. in Microelectronics from University of Sao Paulo – USP with focus on Radiofrequency Integrated Circuits. Francisco Brito Filho worked from 2009 to 2013 as RFIC Designer on LSITEC Design House before joining UFERSA. He is the head of Microelectronics and Radiofrequency Research Lab at UFERSA and his main research interests are Microelectronics with focus in RFIC Design, Open-source Hardware and EDA, Instrumentation, AI, IoT and Embedded Systems. He has been an IEEE Member since 2007 and also member of SSC, MTT and CAS IEEE Societies.
Harald Pretl: Harald Pretl (S'97-M'01-SM'08) was born in Linz, Austria, in 1972. He received a Dipl.-Ing. degree in electrical engineering from the Graz University of Technology, Austria, in 1997, and the Dr.techn. degree from the Johannes Kepler University (JKU) in Linz, Austria, in 2001, for his work on first-generation direct-conversion transceivers for 3G.
From 2000 to 2011, he worked at Infineon Technologies as Director and Senior Principal Engineer, and from 2011 to 2019 at Intel as Senior Principal Engineer and Chief RF Technologist, contributing to several generations of cellular RF transceivers and mobile communications platforms, spanning from 2G to 5G, as analog circuit designer, project lead and RF systems architect. Since 2015 he has been a full professor heading the Institute for Integrated Circuits (IIC) at the JKU, Linz, where he is leading the Energy-Efficient Analog Circuits & Systems Group. Harald is a co-lead of the LIT/SAL mmWave Lab and the lead developer of the IIC-OSIC-TOOLS, an open-source IC design environment.
Harald Pretl was a member of the technical program committee of the ISSCC in 2010-2012 and has published more than 80 papers at international conferences and journals in the area of RF transceivers and analog circuits, in addition to more than 25 issued or filed patents. His current research interests are focused on cellular transceivers, wireless sensor networks, micro-power RF SoC for medical applications, and mm-wave circuits for 6G and advanced radar, as well as open-source IC design. He is a co-recipient of first place in the 2015 MTT-S PAWR student paper competition, the 2019 ReSMiQ best paper award at the IEEE NEWCAS conference, the 2019 APMC student prize, and a 2021 ISCAS best paper award. He is also a co-recipient of the Intel Achievement Award in 2019. He is a member of the Austrian Electrotechnical Association (OVE), the Association for Electrical, Electronic & Information Technologies (VDE), and the Silicon Austria Labs Advisory Board.
Mehdi Saligane: Mehdi Saligane is a Research Scientist in the Department of Electrical Engineering and Computer Science at the University of Michigan. He received his M.Sc. and Ph.D. degrees in electrical and computer engineering from the University of Grenoble and Aix-Marseille in 2011 and 2016, respectively. He worked at STMicroelectronics, in France, as a Research Engineer from 2010 to 2015, and after completing his Ph.D., he joined the Michigan Integrated Circuits Lab at the University of Michigan. Dr. Saligane’s current research interests are in low-power and energy-efficient IC design, with a focus on open-source EDA and analog and mixed-signal IC design automation. He currently serves as chair of the Analog Working Group, as a member of the Technical Steering Committee at CHIPS Alliance, and as a technical member of SSCS’ open source ecosystem.
Chiraag Juvekar received the B.Tech. and M.Tech. degrees in electrical engineering from IIT Bombay, Mumbai, India, in 2012, and the S. M. and PhD degree in electrical engineering and computer science from the Massachusetts Institute of Technology, Cambridge, MA, USA, in 2014 and 2018 respectively. He is currently a software architect with Apple. In the past he has worked as a researcher with Analog Devices and the Embedded Processing Lab at Texas Instruments. His research interests include low-power system design, hardware security, and neural network acceleration. Dr. Juvekar was a recipient of the MIT Presidential Fellowship in 2012 and the Qualcomm Innovation Fellowship in 2016. He was also a recipient of the Chorafas Foundation Award for 2018 and the 2018 Jin-Au Kong Award for the Best Ph.D. Theses in electrical engineering at MIT
Rana Muhammad: Rana Muhamad Shahid Jamil received his BS degree in Electrical Engineering from National University of Sciences and Technology (NUST), Pakistan in 2019 and Masters’ degree in EE with specialization in Integrated circuits design from National University of Computer and Emerging Sciences (NUCES), Pakistan in 2021. He is currently working as a Research Associate in Radio Frequency Circuits, Sensors and Systems (RFCS2) Lab. His research interests include Mixed Signal and RFICs. He was one of the selected participants of the first IEEE PICO design contest held in 2021. He has organized a number of hands-on workshops/training sessions on open-source design tools and PDKs in Pakistan to spread awareness on the open-source silicon revolution.